AD9887A Analog Devices, Inc., AD9887A Datasheet - Page 15

• Manufacturer Part Number: AD9887A
• Description: Dual Interface For Flat Panel Displays
• Manufacturer: Analog Devices, Inc.

R
G
B
R
G
B
MIDSC
CLAMP
MIDSC
CLAMP
MIDSC
CLAMP
V
V
V
V
V
V
Red Channel Midscale Clamp Voltage Output
Green Channel Midscale Clamp Voltage Output
Blue Channel Midscale Clamp Voltage Output
Red Channel Midscale Clamp Voltage Input
Green Channel Midscale Clamp Voltage Input
Blue Channel Midscale Clamp Voltage Input
These pins are part of the circuit that provides a
voltage reference for midscale clamping used in the
capture of YUV and YPbPr input signals. These
pins should be grounded through 0.1 μF capacitors,
as shown in Figure 4.
Rev. B | Page 15 of 52
Data Clock Outputs
DATACK Data Output Clock
DATACK Data Output Clock Complement
These signals are produced by the internal clock
generator and are synchronous with the internal
pixel sampling clock.
When the AD9887A is operated in single-channel
mode, the output frequency is equal to the pixel
sampling frequency. When the AD9887A is operated
in dual-channel mode, the clock frequency is half
the pixel frequency.
When the sampling time is changed by adjusting
the PHASE register, the output timing is shifted as
well. The Data, DATACK, DATACK , and HSOUT
outputs are moved; therefore, the timing
relationship among the signals is maintained.
These differential data clock output signals are used to
strobe the output data and HSOUT into external logic.
AD9887A