MT8941BP1 Zarlink Semiconductor, Inc., MT8941BP1 Datasheet - Page 10

• Manufacturer Part Number: MT8941BP1
• Manufacturer: Zarlink Semiconductor, Inc.

The T1 and CEPT standards specify that, for free running equipment, the output clock tolerance must be less than
or equal to ±32ppm and ±50ppm respectively. This requirement restricts the oscillators of DPLL #1 and DPLL #2
to have maximum tolerances of ±32ppm and ±50ppm respectively.
Table 6 - Lock-in Range vs. Oscillator Frequency Tolerance
Figure 5 - The Spectrum of the Inherent Jitter for either PLL
Note: * Please refer to the section on “Jitter Performance and Lock-in
Tolerance (±ppm)
Oscillator Clock*
Range” for recommended oscillator tolerances for DPLL #1 & #2.
100
150
175
10
20
32
50
5
Zarlink Semiconductor Inc.
MT8941B
DPLL #1
10
2.55
2.51
2.43
2.33
2.19
1.79
1.39
1.19
Lock-in Range (±Hz)
DPLL #2
1.91
1.87
1.79
1.69
1.55
1.15
.75
.55
Data Sheet