CLA80000 Zarlink Semiconductor, CLA80000 Datasheet - Page 9
![no-image](/images/manufacturer_photos/0/7/727/zarlink_semiconductor_sml.jpg)
CLA80000
Manufacturer Part Number
CLA80000
Description
High Density CMOS Gate Arrays
Manufacturer
Zarlink Semiconductor
Datasheet
1.CLA80000.pdf
(24 pages)
- Current page: 9 of 24
- Download datasheet (441Kb)
8 stage ripple carry adder
8 stage ripple carry adder
10 NAND2 gates, lightly loaded
10 NAND2 gates mixed heavy then light
loading
10 NAND2 gates heavy loading
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0
0
Cell
10
10
Figure 7 Inverter falling delay
Figure 8 Inverter rising delay
Typical process, 5V,
Slow process, 4.5V,
Slow process, 4.5V,
Slow process, 4.5V,
Slow process, 4.5V,
Conditions
Output Load (LU)
20
20
Output Load (LU)
70 ° C
25 ° C
70 ° C
70 ° C
70 ° C
30
30
delay (ps)
CLA80k
12825
27421
4872
7696
3463
SPICE (ps)
40
12479
28606
40
4679
7455
3464
12.0
8.0
4.0
2.0
1.0
0.5
12.0
8.0
4.0
2.0
1.0
0.5
Accuracy
2.8%
4.1%
4.0%
3.2%
0.0%
50
50
9
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