LM3S2918 Luminary Micro, Inc, LM3S2918 Datasheet - Page 414

• Manufacturer Part Number: LM3S2918
• Description: Lm3s2918 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Controller Area Network (CAN) Module
16.4.1
16.4.2
414
The message object memory is a set of 32 identical memory blocks that hold the current configuration,
status, and actual data for each message object. These are accessed via the CAN message object
register interface. The message memory is not directly accessable in the Stellaris
so the Stellaris
The CAN message object register interface provides two register sets for communicating with the
message objects. Since there is no direct access to the message object memory, these two interfaces
must be used to read or write to each message object. The two message object interfaces allow
parallel access to the CAN controller message objects when multiple objects may have new
information that needs to be processed.
Initialization
The software initialization is started by setting the INIT bit in the CAN Control (CANCTL) register
(with software or by a hardware reset) or by going bus-off, which occurs when the transmitter's error
counter exceeds a count of 255. While INIT is set, all message transfers to and from the CAN bus
are stopped and the status of the CAN transmit output is recessive (High). Entering the initialization
state does not change the configuration of the CAN controller, the message objects, or the error
counters. However, some configuration registers are only accessible when in the initialization state.
To initialize the CAN controller, set the CAN Bit Timing (CANBIT) register and configure each
message object. If a message object is not needed, it is sufficient to set it as not valid by clearing
the MsgVal bit in the CANIFnARB2 register. Otherwise, the whole message object has to be
initialized, as the fields of the message object may not have valid information, causing unexpected
results. Access to the CAN Bit Timing (CANBIT) register and to the CAN Baud Rate Prescalar
Extension (CANBRPE) register to configure the bit timing is enabled when both the INIT and CCE
bits in the CANCTL register are set. To leave the initialization state, the INIT bit must be cleared.
Afterwards, the internal Bit Stream Processor (BSP) synchronizes itself to the data transfer on the
CAN bus by waiting for the occurrence of a sequence of 11 consecutive recessive bits (Bus Idle)
before it takes part in bus activities and starts message transfers. The initialization of the message
objects is independent of being in the initialization state and can be done on the fly, but message
objects should all be configured to particular identifiers or set to not valid before the BSP starts the
message transfer. To change the configuration of a message object during normal operation, set
the MsgVal bit in the CANIFnARB2 register to 0 (not valid). When the configuration is completed,
MsgVal is set to 1 again (valid).
Operation
Once the CAN module is initialized and the INIT bit in the CANCTL register is reset to 0, the CAN
module synchronizes itself to the CAN bus and starts the message transfer. As messages are
received, they are stored in their appropriate message objects if they pass the message handler's
filtering. The whole message (including all arbitration bits, data-length code, and eight data bytes)
is stored in the message object. If the Identifier Mask (the Msk bits in the CANIFnMSKn registers)
is used, the arbitration bits that are masked to "don't care" may be overwritten in the message object.
The CPU may read or write each message at any time via the CAN Interface Registers (CANIFnCRQ,
CANIFnCMSK, CANIFnMSKn, CANIFnARBn, CANIFnMCTL, CANIFnDAn, and CANIFnDBn).
The message handler guarantees data consistency in case of concurrent accesses.
The transmission of message objects is under the control of the software that is managing the CAN
hardware. These can be message objects used for one-time data transfers, or permanent message
objects used to respond in a more periodic manner. Permanent message objects have all arbitration
and control set up, and only the data bytes are updated. To start the transmission, the TxRqst bit
in the CANTXRQn register and the NewDat bit in the CANNWDAn register are set. If several transmit
messages are assigned to the same message object (when the number of message objects is not
®
CAN controller provides an interface to communicate with the message memory.
Preliminary
®
memory map,
July 26, 2008