LM3S6911 Luminary Micro, Inc, LM3S6911 Datasheet - Page 67

• Manufacturer Part Number: LM3S6911
• Description: Lm3s6911 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

6.3
Table 6-1. System Control Register Map
July 26, 2008
Offset
0x01C
0x05C
0x000
0x004
0x008
0x010
0x014
0x018
0x030
0x034
0x040
0x044
0x048
0x050
0x054
0x058
Name
DID0
DID1
DC0
DC1
DC2
DC3
DC4
PBORCTL
LDOPCTL
SRCR0
SRCR1
SRCR2
RIS
IMC
MISC
RESC
1.
2.
3.
4.
5.
Register Map
Table 6-1 on page 67 lists the System Control registers, grouped by function. The offset listed is a
hexadecimal increment to the register’s address, relative to the System Control base address of
0x400F.E000.
Note:
Bypass the PLL and system clock divider by setting the BYPASS bit and clearing the USESYS
bit in the RCC register. This configures the system to run off a “raw” clock source (using the
main oscillator or internal oscillator) and allows for the new PLL configuration to be validated
before switching the system clock to the PLL.
Select the crystal value (XTAL) and oscillator source (OSCSRC), and clear the PWRDN bit in
RCC/RCC2. Setting the XTAL field automatically pulls valid PLL configuration data for the
appropriate crystal, and clearing the PWRDN bit powers and enables the PLL and its output.
Select the desired system divider (SYSDIV) in RCC/RCC2 and set the USESYS bit in RCC. The
SYSDIV field determines the system frequency for the microcontroller.
Wait for the PLL to lock by polling the PLLLRIS bit in the Raw Interrupt Status (RIS) register.
Enable use of the PLL by clearing the BYPASS bit in RCC/RCC2.
Spaces in the System Control register space that are not used are reserved for future or
internal use by Luminary Micro, Inc. Software should not modify any reserved memory
address.
R/W1C
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
RO
RO
0xBF00.0FC0
0x0000.30DF
0x0000.7FFD
0x00FF.007F
0x5000.00FF
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x030F.5037
0x00000000
0x00000000
0x00000000
Reset
-
-
-
Preliminary
Description
Device Identification 0
Device Identification 1
Device Capabilities 0
Device Capabilities 1
Device Capabilities 2
Device Capabilities 3
Device Capabilities 4
Brown-Out Reset Control
LDO Power Control
Software Reset Control 0
Software Reset Control 1
Software Reset Control 2
Raw Interrupt Status
Interrupt Mask Control
Masked Interrupt Status and Clear
Reset Cause
LM3S6911 Microcontroller
page
See
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67