LM3S6911 Luminary Micro, Inc, LM3S6911 Datasheet - Page 184

• Manufacturer Part Number: LM3S6911
• Description: Lm3s6911 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Reset
Reset
Type
Type
General-Purpose Input/Outputs (GPIOs)
GPIO Open Drain Select (GPIOODR)
GPIO Port A base: 0x4000.4000
GPIO Port B base: 0x4000.5000
GPIO Port C base: 0x4000.6000
GPIO Port D base: 0x4000.7000
GPIO Port E base: 0x4002.4000
GPIO Port F base: 0x4002.5000
GPIO Port G base: 0x4002.6000
GPIO Port H base: 0x4002.7000
Offset 0x50C
Type R/W, reset 0x0000.0000
184
Bit/Field
31:8
7:0
RO
RO
31
15
0
0
Register 14: GPIO Open Drain Select (GPIOODR), offset 0x50C
The GPIOODR register is the open drain control register. Setting a bit in this register enables the
open drain configuration of the corresponding GPIO pad. When open drain mode is enabled, the
corresponding bit should also be set in the GPIO Digital Input Enable (GPIODEN) register (see
page 188). Corresponding bits in the drive strength registers (GPIODR2R, GPIODR4R, GPIODR8R,
and GPIOSLR ) can be set to achieve the desired rise and fall times. The GPIO acts as an open
drain input if the corresponding bit in the GPIODIR register is set to 0; and as an open drain output
when set to 1.
When using the I
Function Select (GPIOAFSEL) register bit for the I
examples in “Initialization and Configuration” on page 166).
RO
RO
30
14
0
0
reserved
RO
RO
29
13
0
0
Name
ODE
RO
RO
28
12
0
0
reserved
2
C module, in addition to configuring the pin to open drain, the GPIO Alternate
RO
RO
27
11
0
0
Type
R/W
RO
RO
RO
26
10
0
0
Reset
0x00
0x00
RO
RO
25
0
9
0
Preliminary
RO
RO
24
0
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Output Pad Open Drain Enable
The ODE values are defined as follows:
Value
reserved
0
1
R/W
RO
23
Description
Open drain configuration is disabled.
Open drain configuration is enabled.
0
7
0
2
C clock and data pins should be set to 1 (see
R/W
RO
22
0
6
0
R/W
RO
21
0
5
0
R/W
RO
20
0
4
0
ODE
R/W
RO
19
0
3
0
R/W
RO
18
0
2
0
July 26, 2008
R/W
RO
17
0
1
0
R/W
RO
16
0
0
0