LM3S6911 Luminary Micro, Inc, LM3S6911 Datasheet - Page 10

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LM3S6911

Manufacturer Part Number
LM3S6911
Description
Lm3s6911 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Table of Contents
List of Tables
Table 1.
Table 2.
Table 3-1.
Table 4-1.
Table 4-2.
Table 5-1.
Table 5-2.
Table 6-1.
Table 7-1.
Table 8-1.
Table 8-2.
Table 8-3.
Table 9-1.
Table 9-2.
Table 9-3.
Table 10-1.
Table 10-2.
Table 10-3.
Table 11-1.
Table 12-1.
Table 13-1.
Table 14-1.
Table 14-2.
Table 14-3.
Table 15-1.
Table 15-2.
Table 16-1.
Table 16-2.
Table 16-3.
Table 16-4.
Table 18-1.
Table 18-2.
Table 18-3.
Table 18-4.
Table 18-5.
Table 18-6.
Table 18-7.
Table 18-8.
Table 19-1.
Table 19-2.
Table 20-1.
Table 20-2.
Table 20-3.
Table 20-4.
Table 20-5.
Table 20-6.
10
Revision History .............................................................................................................. 18
Documentation Conventions ............................................................................................ 20
Memory Map ................................................................................................................... 42
Exception Types .............................................................................................................. 44
Interrupts ........................................................................................................................ 45
JTAG Port Pins Reset State ............................................................................................. 49
JTAG Instruction Register Commands ............................................................................... 54
System Control Register Map ........................................................................................... 67
Hibernation Module Register Map ................................................................................... 126
Flash Protection Policy Combinations ............................................................................. 140
Flash Resident Registers ............................................................................................... 142
Flash Register Map ........................................................................................................ 143
GPIO Pad Configuration Examples ................................................................................. 167
GPIO Interrupt Configuration Example ............................................................................ 167
GPIO Register Map ....................................................................................................... 168
Available CCP Pins ........................................................................................................ 205
16-Bit Timer With Prescaler Configurations ..................................................................... 208
Timers Register Map ...................................................................................................... 214
Watchdog Timer Register Map ........................................................................................ 241
UART Register Map ....................................................................................................... 269
SSI Register Map .......................................................................................................... 315
Examples of I
Inter-Integrated Circuit (I
Write Field Decoding for I2CMCS[3:0] Field (Sheet 1 of 3) ................................................ 358
TX & RX FIFO Organization ........................................................................................... 380
Ethernet Register Map ................................................................................................... 383
Comparator 0 Operating Modes ..................................................................................... 421
Comparator 1 Operating Modes ...................................................................................... 422
Internal Reference Voltage and ACREFCTL Field Values ................................................. 422
Analog Comparators Register Map ................................................................................. 424
Signals by Pin Number ................................................................................................... 434
Signals by Signal Name ................................................................................................. 438
Signals by Function, Except for GPIO ............................................................................. 442
GPIO Pins and Alternate Functions ................................................................................. 445
Signals by Pin Number ................................................................................................... 447
Signals by Signal Name ................................................................................................. 451
Signals by Function, Except for GPIO ............................................................................. 456
GPIO Pins and Alternate Functions ................................................................................. 459
Temperature Characteristics ........................................................................................... 461
Thermal Characteristics ................................................................................................. 461
Maximum Ratings .......................................................................................................... 462
Recommended DC Operating Conditions ........................................................................ 462
LDO Regulator Characteristics ....................................................................................... 463
Detailed Power Specifications ........................................................................................ 464
Flash Memory Characteristics ........................................................................................ 465
Hibernation Module DC Characteristics ........................................................................... 465
2
C Master Timer Period versus Speed Mode ............................................... 344
2
C) Interface Register Map ......................................................... 353
Preliminary
July 26, 2008

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