LM3S1133 Luminary Micro, Inc, LM3S1133 Datasheet - Page 428
LM3S1133
Manufacturer Part Number
LM3S1133
Description
Lm3s1133 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S1133.pdf
(527 pages)
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Pulse Width Modulator (PWM)
17.2.5
17.2.6
17.2.7
17.2.8
428
Interrupt/ADC-Trigger Selector
The PWM generator also takes the same four (or six) counter events and uses them to generate
an interrupt or an ADC trigger. Any of these events or a set of these events can be selected as a
source for an interrupt; when any of the selected events occur, an interrupt is generated. Additionally,
the same event, a different event, the same set of events, or a different set of events can be selected
as a source for an ADC trigger; when any of these selected events occur, an ADC trigger pulse is
generated. The selection of events allows the interrupt or ADC trigger to occur at a specific position
within the PWM signal. Note that interrupts and ADC triggers are based on the raw events; delays
in the PWM signal edges caused by the dead-band generator are not taken into account.
Synchronization Methods
There is a global reset capability that can reset the counter of the PWM generator.
The counter load values and comparator match values of the PWM generator can be updated in
two ways. The first is immediate update mode, where a new value is used as soon as the counter
reaches zero. By waiting for the counter to reach zero, a guaranteed behavior is defined, and overly
short or overly long output PWM pulses are prevented.
The other update method is synchronous, where the new value is not used until a global synchronized
update signal is asserted, at which point the new value is used as soon as the counter reaches
zero. This second mode allows multiple items to be updated simultaneously without odd effects
during the update; everything runs from the old values until a point at which they all run from the
new values.
Fault Conditions
There are two external conditions that affect the PWM block; the signal input on the Fault pin and
the stalling of the controller by a debugger. There are two mechanisms available to handle such
conditions: the output signals can be forced into an inactive state and/or the PWM timers can be
stopped.
Each output signal has a fault bit. If set, a fault input signal causes the corresponding output signal
to go into the inactive state. If the inactive state is a safe condition for the signal to be in for an
extended period of time, this keeps the output signal from driving the outside world in a dangerous
manner during the fault condition. A fault condition can also generate a controller interrupt.
Each PWM generator can also be configured to stop counting during a stall condition. The user can
select for the counters to run until they reach zero then stop, or to continue counting and reloading.
A stall condition does not generate a controller interrupt.
Output Control Block
With the PWM generator block producing two raw PWM signals, the output control block takes care
of the final conditioning of the PWM signals before they go to the pins. Via a single register, the set
of PWM signals that are actually enabled to the pins can be modified; this can be used, for example,
to perform commutation of a brushless DC motor with a single register write (and without modifying
the individual PWM generators, which are modified by the feedback control loop). Similarly, fault
control can disable any of the PWM signals as well. A final inversion can be applied to any of the
PWM signals, making them active Low instead of the default active High.
Preliminary
July 26, 2008
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