VG36128161BT-8H Powerchip, VG36128161BT-8H Datasheet - Page 24
![no-image](/images/no-image-200.jpg)
VG36128161BT-8H
Manufacturer Part Number
VG36128161BT-8H
Description
CMOS Synchronous Dynamic RAM
Manufacturer
Powerchip
Datasheet
1.VG36128161BT-8H.pdf
(69 pages)
VIS
Document :1G5-0183
10. BURST Termination
stop command and the other is the precharge command.
10.1 BURST Stop Command
goes to high-impedance after the CAS latency from the burst stop command.
Hi-Z at the same clock with the burst stop command.
Burst Termination
Remark BST: Burst stop command
Remark BST: Burst command
There are two methods to terminate a burst operation other than using a read or a write command. One is the burst
During a read burst, when the burst stop command is issued, the burst read data are terminated and the data bus
During a write burst, when the burst stop command is issued, the burst write data are termained and data bus goes to
CAS latency=3
CAS latency=2,3
CAS latency=2
Command
Command
CLK
CLK
DQ
DQ
DQ
T0
T0
Write
Read
Q0
T1
T1
Q0
Rev.5
T2
T2
Q0
VG36128401B / VG36128801B / VG36128161B
Q1
T3
T3
BST
Q1
Q0
Q2
CMOS Synchronous Dynamic RAM
T4
T4
BST
Q2
Q1
T5
T5
Q2
Burst lengh=X, CAS latency=2,3
Burst lengh=X, CAS Intency=2,3
Hi-Z
Hi-Z_
T6
T6
Page 24
Hi-Z
T7
T7