VG36128161BT-8H Powerchip, VG36128161BT-8H Datasheet - Page 21

• Manufacturer Part Number: VG36128161BT-8H
• Description: CMOS Synchronous Dynamic RAM
• Manufacturer: Powerchip

9. Read / Write Command Interval
9.1 Read to Read Command Interval
ous read operation has not completed. READ will be interrupted by another READ.
VIS
9.2 Write to Write Command Interval
begin with a new write command. WRITE will be interrupted by another WRITE.
WRITE to WRITE Command Interval
Document :1G5-0183
READ to READ Command Interval
During a read cycle when a new read command is asserted, it will be effective after the CAS latency, even if the previ-
Each read command can be asserted in every clock without any restriction.
During a write cycle, when a new Write command is asserted, the previous burst will terminated and the new burst will
Each write command can be asserted in every clock without any restriction.
Command
Command
CLK
DQ
CLK
DQ
T0
T0
Read A
Write A
QA0
1 cycle
1 cycle
T1
T1
Read B
Write B
QB0
T2
T2
QA0
QB1
Rev.5
T3
T3
QB0
VG36128401B / VG36128801B / VG36128161B
QB2
T4
T4
QB1
QB3
CMOS Synchronous Dynamic RAM
T5
T5
QB2
Hi-Z_
T6
Burst lengh=4, CAS latency=2
T6
Burst lengh=4, CAS latency=2
QB3
T7
T7
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Hi-Z_
T8
T8