XC3S1000L-4FT256C Xilinx, Inc., XC3S1000L-4FT256C Datasheet - Page 75
![no-image](/images/no-image-200.jpg)
XC3S1000L-4FT256C
Manufacturer Part Number
XC3S1000L-4FT256C
Description
1000000 SYSTEM GATE 1.2 VOLT FPGA
Manufacturer
Xilinx, Inc.
Datasheet
1.XC3S1000L-4FT256C.pdf
(217 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- Current page: 75 of 217
- Download datasheet (3Mb)
Table 46: Output Timing Adjustments for IOB (Continued)
DS099-3 (v2.5) December 4, 2009
Product Specification
98
LVCMOS33
LVDCI_33
LVDCI_DV2_33
LVTTL
LVCMOS25 with 12mA Drive
Following Signal Standard
Convert Output Time from
and Fast Slew Rate to the
(IOSTANDARD)
R
Slow
Slow
Fast
Fast
12 mA
16 mA
24 mA
12 mA
16 mA
24 mA
12 mA
16 mA
24 mA
12 mA
16 mA
24 mA
2 mA
4 mA
6 mA
8 mA
2 mA
4 mA
6 mA
8 mA
2 mA
4 mA
6 mA
8 mA
2 mA
4 mA
6 mA
8 mA
Add the Adjust-
6.38
4.83
4.01
3.92
2.91
2.81
2.49
3.86
1.87
0.62
0.61
0.16
0.14
0.06
0.28
0.26
7.27
4.94
3.98
3.98
2.97
2.84
2.65
4.32
1.87
1.27
1.19
0.42
0.27
0.16
Speed Grade
ment Below
-5
7.34
5.55
4.61
4.51
3.35
3.23
2.86
4.44
2.15
0.71
0.70
0.19
0.16
0.07
0.32
0.30
8.36
5.69
4.58
4.58
3.42
3.26
3.04
4.97
2.15
1.47
1.37
0.48
0.32
0.18
Spartan-3 FPGA Family: DC and Switching Characteristics
-4
Units
www.xilinx.com
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Table 46: Output Timing Adjustments for IOB (Continued)
Notes:
1.
2.
3.
PCI33_3
SSTL18_I
SSTL18_I_DCI
SSTL18_II
SSTL2_I
SSTL2_I_DCI
SSTL2_II
SSTL2_II_DCI
Differential Standards
LDT_25 (ULVDS_25)
LVDS_25
BLVDS_25
LVDSEXT_25
LVPECL_25
RSDS_25
DIFF_HSTL_II_18
DIFF_HSTL_II_18_DCI
DIFF_SSTL2_II
DIFF_SSTL2_II_DCI
LVCMOS25 with 12mA Drive
Following Signal Standard
Convert Output Time from
and Fast Slew Rate to the
The numbers in this table are tested using the methodology
presented in
conditions set forth in
These adjustments are used to convert output- and
three-state-path times originally specified for the LVCMOS25
standard with 12 mA drive and Fast slew rate to times that
correspond to other signal standards. Do not adjust times
that measure when outputs go into a high-impedance state.
For minimums, use the values reported by the Xilinx timing
analyzer.
(IOSTANDARD)
Table 47
Table
and are based on the operating
31,
Table
Add the Adjust-
–0.06
–0.09
–0.15
–0.02
0.74
0.07
0.22
0.30
0.23
0.19
0.13
0.10
0.02
0.16
0.05
0.75
0.13
0.10
Speed Grade
ment Below
-5
34, and
–0.05
–0.07
–0.13
–0.01
0.85
0.07
0.25
0.34
0.26
0.22
0.15
0.11
0.04
0.18
0.06
0.86
0.15
0.11
Table
-4
36.
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
75
Related parts for XC3S1000L-4FT256C
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![XC3S1200E-5FT256C](/images/no-image3.png)
Part Number:
Description:
XC3S1200E-5FT256C
Manufacturer:
Xilinx, Inc.
Datasheet:
![XC3S250E](/images/no-image3.png)
Part Number:
Description:
Spartan-3E FPGA Family
Manufacturer:
Xilinx, Inc.
Datasheet:
![XC95144-7PQ100I](/images/no-image3.png)
Part Number:
Description:
XC95144 In-System Programmable CPLD
Manufacturer:
Xilinx, Inc.
![XC95144-7TQ100I](/images/no-image3.png)
Part Number:
Description:
XC95144 In-System Programmable CPLD
Manufacturer:
Xilinx, Inc.
![XC95144XL-10CS144C](/images/no-image3.png)
Part Number:
Description:
XC95144XL High Performance CPLD
Manufacturer:
Xilinx, Inc.
![XC95144XV-5CS144C](/images/no-image3.png)
Part Number:
Description:
High-performance CPLD. Speed 5ns pin-to-pin delay.
Manufacturer:
Xilinx, Inc.
![XC95288XV-10CS280I](/images/no-image3.png)
Part Number:
Description:
High-performance CPLD. Speed 10ns pin-to-pin delay.
Manufacturer:
Xilinx, Inc.
![XC2C128-7CP132C](/images/no-image3.png)
Part Number:
Description:
128 MACROCELL 1.8V ZERO POWER ISP CPLD
Manufacturer:
Xilinx, Inc.
![XC2C256-5CP132C](/images/no-image3.png)
Part Number:
Description:
CPLD, CoolRunner-II Family, CMOS Process, 256 Macro Cells, 256 Reg., 106 User I/Os, 1.8V Supply, 5 Speed Grade, 132BGA
Manufacturer:
Xilinx, Inc.