EM636327Q-7 Etron Technology Inc., EM636327Q-7 Datasheet - Page 4

• Manufacturer Part Number: EM636327Q-7
• Description: 512K x 32 High Speed Synchronous Graphics DRAM(SGRAM)
• Manufacturer: Etron Technology Inc.

1, 3, 4, 6 , 7,
Preliminary
97, 98, 100,
2, 8, 14, 22,
23, 56, 24,
60, 61, 63,
64, 68, 69,
10, 12, 13,
17, 18, 20,
21, 74, 75,
77, 78, 80,
59, 67, 73,
62, 70, 76,
15, 35, 65,
16, 46, 66,
81, 83, 84
36-45, 52,
71, 72, 9,
58, 86-95
5, 11, 19,
82, 99
53
57
79
96
85
DQM0 -
DQM3
DQ31
DQ0-
V
V
DSF
V
V
NC
DDQ
SSQ
DD
SS
Input/
Output
Supply DQ Power: Provide isolated power to DQs for improved noise immunity.
Supply DQ Ground: Provide isolated ground to DQs for improved noise immunity.
Supply Power Supply: +3.3V 0.3V
Supply Ground
Input Define Special Function: The DSF signal defines the operation commands
Input Data Input/Output Mask: DQM0-DQM3 are byte specific, nonpersistent I/O
-
in conjunction with the RAS# and CAS# and WE# signals and is latched at
the positive edges of CLK. The DSF input is used to select the masked write
disable/enable command and block write command, and the Special Mode
Register Set cycle.
buffer controls. The I/O buffers are placed in a high-z state when DQM is
sampled HIGH. Input data is masked when DQM is sampled HIGH during a
write cycle. Output data is masked (two-clock latency) when DQM is sampled
HIGH during a read cycle. DQM3 masks DQ31-DQ24, DQM2 masks DQ23-
DQ16, DQM1 masks DQ15-DQ8, and DQM0 masks DQ7-DQ0.
Data I/O: The DQ0-31 input and output data are synchronized with the
positive edges of CLK. The I/Os are byte-maskable during Reads and Writes.
The DQs also serve as column/byte mask inputs during Block Writes.
No Connect: These pins should be left unconnected.
4
EM636327
December
1998