EM636327Q-7 Etron Technology Inc., EM636327Q-7 Datasheet - Page 17

• Manufacturer Part Number: EM636327Q-7
• Description: 512K x 32 High Speed Synchronous Graphics DRAM(SGRAM)
• Manufacturer: Etron Technology Inc.

Preliminary
14 Burst Stop command
15 Device Deselect command
16 AutoRefresh command (refer to Figures 3 & 4 in Timing Waveforms)
CLK
COMMAND
CAS# latency=1
t CK1 , DQ's
CAS# latency=2
t CK2 , DQ's
CAS# latency=3
t CK3 , DQ's
CLK
COM MAND
CAS# latency=1, 2, 3
DQ's
Termination of a Burst Read Operation
Termination of a Burst Write Operation
(RAS# = "H", CAS# = "H", WE# = "L", DSF = "L")
command is only effective in a read/write burst without the auto precharge function. The terminated
read burst ends after a delay equal to the CAS# latency (refer to the following figure). The
termination of a write burst is shown in the following figure.
(CS# = "H")
and Address inputs are ignored, regardless of whether the CLK is enabled. This command is similar
to the No Operation command.
(RAS# = "L", CAS# = "L", WE# = "H", DSF = "L", CKE = "H", BS, A0-A9 = Don't care)
CAS#-before-RAS# (CBR) Refresh in conventional DRAMs. This command is non-persistent, so it
must be issued each time a refresh is required. The addressing is generated by the internal refresh
controller. This makes the address bits a "don't care" during an AutoRefresh command. The internal
refresh counter increments automatically on every auto refresh cycle to all of the rows. The refresh
operation must be performed 2048 times within 32ms. The time required to complete the auto
refresh operation is specified by t
to be in the idle state and the device must not be in power down mode (CKE is high in the previous
cycle). This command must be followed by NOPs until the auto refresh operation is completed. The
precharge time requirement, t
performed.
The Burst Stop command is used to terminate either fixed-length or full-page bursts. This
The Device Deselect command disables the command decoder so that the RAS#, CAS#, WE#
The AutoRefresh command is used during normal operation of the SGRAM and is analogous to
READ A
T0
T0
NOP
WRITE A
DIN A 0
DOUT A 0
T 1
T 1
NOP
DIN A 1
RP
DOUT A 0
DOUT A 1
T2
T2
NOP
NOP
(min), must be met before successive auto refresh operations are
RC
(min.). To provide the AutoRefresh command, both banks need
DOUT A 0
DIN A 2
DOUT A 2
DOUT A 1
T3
NOP
T3
NOP
17
Input data for the Write is masked.
(Burst Length ¡Ö 4, CAS# Latency = 1, 2, 3)
Burst Stop
Burst Stop
don't care
(Burst Length = X, CAS# Latency = 1, 2, 3)
DOUT A 1
DOUT A 2
DOUT A 3
T4
T4
DOUT A 2
DOUT A 3
T5
NOP
The burst ends after a delay equal to the CAS# latency.
T5
NOP
DOUT A 3
T6
NOP
T6
NOP
EM636327
NOP
T7
NOP
T7
December
NOP
T8
NOP
T8
1998