AN2244 Freescale Semiconductor / Motorola, AN2244 Datasheet - Page 18

• Manufacturer Part Number: AN2244
• Description: Interconnecting Two MSC8101ADS Boards Across a 60x-Compatible Bus to the Host Interface
• Manufacturer: Freescale Semiconductor / Motorola

Source Code Files, Software Flow, and Register Settings
18
Host MSC8101 Cont.
Module
Channel Configuration Registers
Interrupt Status Register (ISR)
Rx DMA Channel BD and
Status Register (BCSR)
Interrupt and Associated
Configure and enable
Configure and enable
Memory-Map HDI16
Core-Side Registers
Board Control and
Configure ADS’s
DMA Complete
Set Host Flag 4
1 and 2 Set?
Host Flags
Start
End
Figure 8 and Figure 9 detail the software flow of both the HDI16 MSC8101 and host MSC8101
programs.
Yes
dma.c
msc8101.h
types.h
hdi16.h
hdi16masks.h
dma.h
dmatest.h
Filename
Table 5. Source Code Project Files (Continued)
Freescale Semiconductor, Inc.
No
Figure 8. HDI16 MSC8101 Software Flow
For More Information On This Product,
Go to: www.freescale.com
Exercise the DMA functionality using both Peripheral -> Memory and Memory ->
Peripheral in Dual Address Mode.
MSC8101 Register Memory Mapping
Specific variables types used in this application
Includes common header files, defines HDI16 memory map and card_initialize (UPM
set-up) function prototype.
Defines bit masks for HDI16 Host Registers and a timeout count value for “wait” loops.
Header file which defines the do_dma function prototype.
Defines DMA buffer, 8101ads and IO Port specific constants.
Channel Configuration Registers
Tx DMA Channel BD and
Configure and enable
Clear Interrupt
Point to next
Rx Buffer
Rx
Description
DMA Complete
Channel?
Interrupt
Rx or Tx
End
Channel Configuration Registers
Rx DMA Channel BD and
Configure and enable
Clear Interrupt
Point to next
Tx Buffer
Tx