AN2203 Freescale Semiconductor / Motorola, AN2203 Datasheet - Page 58

• Manufacturer Part Number: AN2203
• Description: MPC7450 RISC Microprocessor Family Software Optimization Guide
• Manufacturer: Freescale Semiconductor / Motorola

Comparisons with Addition
are v0 in r3, v1 in r4, v2 in r5. For the cases where the second operand is assumed to be 0 such as eq0+,
assume that v0 is in r3 and v2 is in r4. The argument v1 is assumed to be 0 for these cases and does not
require a register.
58
eq+
r = (v0 == v1) + v2;
ne+
r = (v0 != v1) + v2;
les+/ges+
r = ((signed_word) v0 <= (signed_word) v1) + v2;
r = (signed_word) v1 >= (signed_word) v0) + v2;
leu+/geu+
r = ((unsigned_word) v0 <= (unsigned_word) v1) + v2;
r = (unsigned_word) v1 >= (unsigned_word) v0) + v2;
lts+/gts+
r = ((signed_word) v0 < (signed_word) v1) + v2;
r = (signed_word) v1 > (signed_word) v0) + v2;
ltu+/gtu+
r = ((unsigned_word) v0 < (unsigned_word) v1) + v2;
r = (unsigned_word) v1 > (unsigned_word) v0) + v2;
eq0+
r = (v0 == 0) + v1;
ne0+
r = (v0 != 0) + v1
MPC7450 RISC Microprocessor Family Software Optimization Guide
Operation
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 5-4. Comparisons with Addition
Go to: www.freescale.com
subf r6,r3,r4
subfic r7,r6,0
addze r8,r5
Cycles: 5
subf r6,r3,r4
addic r7,r6,-1
addze r8,r5
Cycles: 5
xoris r6,r3,0x8000
xoris r7,r4,0x8000
subfc r8,r6,r7
addze r9,r5
Cycles: 5
subfc r6,r3,r4
addze r7,r5
Cycles: 4
subf r6,r4,r3
xoris r7,r4,0x8000
addc r8,r7,r6
addze r9.r5
Cycles: 5
subfc r6,r4,r3
subfze r7,r5
neg r8,r7
Cycles: 5
subfic r5,r3,0
addze r6,r4
Cycles: 4
addic r5,r3,-1
addze r6,r4
Cycles: 4
Compiler Writer’s
Guide Code
xor r6,r3,r4
cntlzw r6,r6
rlwinm r6,r6,27,31,31
add r7,r5,r6
Cycles: 4
cntlzw r5,r3
srwi r6,r5,5
add r7,r6,r4
Cycles: 3
neg r5,r3
or r6,r5,r3
srwi r7,r6,31
add r8,r7,r4
Cycles: 4
MPC7450 Code
(If Different)
Comments
MOTOROLA