CY28405 Cypress Semiconductor, CY28405 Datasheet - Page 2

• Manufacturer Part Number: CY28405
• Description: CK409-Compliant Clock Synthesizer
• Manufacturer: Cypress Semiconductor

Document #: 38-07512 Rev. *B
Pin Description
1, 2
1, 2, 7, 8, 9 FS_A, FS_B, FS_C,
4
5
39, 42, 45
38, 41, 44
25
26
7, 8, 9
12, 13, 14,
15, 18, 19
22
21
46
20
33
32
31
48
47
3, 10, 16,
24, 27, 34,
40
6, 11, 17,
23, 28, 37,
43
36, 35
30, 29
Pin No.
REF(0:1)
FS_D, FS_E
XIN
XOUT
CPUT(0:1,ITP)
CPUC(0:1,ITP)
DNC
3V66(0:1)
3V66_3/VCH/SELVCH
3V66_2/MODE
PCIF(0:2)
PCI(0:5)
USB_48
DOT_48
IREF
RESET#/PD#
VTT_PWRGD#
SDATA
SCLK
VDDA
VSSA
VDD(REF,PCI,48,3V66,C
PU,ITP)
VSS(REF,PCI,48,3V66,
CPU,ITP)
Name
I/O, PU
I/O, SE
I/O, SE
O, DIF
O, DIF
O, SE
O, SE
O, SE
O, SE
O, SE
O, SE
O, SE
PWR
PWR
GND
GND
Type
PD
PU
I/O
I
I
I
I
I
Reference Clock. 3.3V 14.318-MHz clock output.
3.3V LVTTL latched input for CPU frequency selection.
Crystal Connection or External Reference Frequency Input. This pin
has dual functions. It can be used as an external 14.318-MHz crystal
connection or as an external reference frequency input.
Crystal Connection. Connection for an external 14.318-MHz crystal
output.
CPU Clock Output. Differential CPU clock outputs.
CPU Clock Output. Differential CPU clock outputs.
Do Not Connect.
66-MHz Clock Output. 3.3V 66-MHz clock from internal VCO.
48- or 66-MHz Clock Output. 3.3V selectable through external SELVCH
strapping resistor and SMBus to be 66-MHz or 48-MHz. Default is 66-MHz.
0 = 66 MHz, 1 = 48 MHz
66-MHz Clock Output. 3.3V 66-MHz clock from internal VCO. Reset or
Power-down Mode Select. Selects between RESET# output or PWRDWN#
input for the PWRDWN#/RESET# pin. Default is RESET#. 0 = PD#, 1 =
RESET
Free Running PCI Output. 33-MHz clocks divided down from 3V66.
PCI Clock Output. 33-MHz clocks divided down from 3V66.
Fixed 48-MHz clock output.
Fixed 48-MHz clock output.
Current Reference. A precision resistor is attached to this pin which is
connected to the internal current reference.
3.3V LVTTL input for Power-down# active LOW. Watchdog Timeout
Reset Output
3.3V LVTTL input is a level sensitive strobe used to latch the FS[A:E]
input (active LOW).
SMBus compatible SDATA.
SMBus compatible SCLOCK.
3.3V Power supply for PLL.
Ground for PLL.
3.3V Power supply for outputs.
Ground for outputs.
Description
CY28405
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