CY28324 Cypress Semiconductor, CY28324 Datasheet - Page 7

• Manufacturer Part Number: CY28324
• Description: FTG for Intel Pentium 4 CPU and Chipsets
• Manufacturer: Cypress Semiconductor

Table 3. Byte Read and Byte Write Protocol
Data Byte Configuration Map
Data Byte 0
Data Byte 1
Document #: 38-07002 Rev. *A
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
20:27
11:18
Bit
Bit
Bit
2:8
10
19
28
29
1
9
38, 37
41, 40
Start
Slave address – 7 bits
Write
Acknowledge from slave
Command Code – 8 bits
‘1xxxxxxx’ stands for byte operation
bit[6:0] of the command code represents the offset
of the byte to be accessed
Acknowledge from slave
Data byte – 8 bits
Acknowledge from slave
Stop
Pin#
Pin#
22
23
27
28
30
31
--
--
--
--
--
--
--
--
Byte Write Protocol
Spread Select2
Spread Select1
Spread Select0
SEL3
SEL2
SEL1
SEL0
SEL4
CPU1, CPU1#
CPU0, CPU0#
48MHz
24_48MHz
3V66_3
3V66_2
3V66_1
3V66_0
Description
Name
Name
PRELIMINARY
‘000’ = OFF
‘001’ = Reserved
‘010’ = Reserved
‘011’ = Reserved
‘100’ = ± 0.25%
‘101’ = – 0.5%
‘110’ = ±0.5%
‘111’ = ±0.38%
SW Frequency selection bits. See Table 4.
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
21:27
30:37
11:18
Bit
2:8
10
19
20
28
29
38
39
1
9
Start
Slave address – 7 bits
Write
Acknowledge from slave
Command Code – 8 bits
‘1xxxxxxx’ stands for byte operation
bit[6:0] of the command code represents the offset
of the byte to be accessed
Acknowledge from slave
Repeat start
Slave address – 7 bits
Read
Acknowledge from slave
Data byte from slave – 8 bits
Not acknowledge
Stop
Description
Description
Byte Read Protocol
Description
CY28324
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Power-On
Power-On
Default
Default
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1