HT46R52 Holtek Semiconductor, HT46R52 Datasheet - Page 6

• Manufacturer Part Number: HT46R52
• Description: (HT46R51 / HT46R52) A/D Type 8-Bit OTP MCU
• Manufacturer: Holtek Semiconductor

The lower byte of the PC (PCL) is a readable and
writeable register (06H). Moving data into the PCL per-
forms a short jump. The destination is within 256 loca-
tions.
When a control transfer takes place, an additional
dummy cycle is required.
Program Memory - EPROM
The program memory is used to store the program in-
structions which are to be executed. It also contains
data, table, and interrupt entries, and is organized into
1024 14 (HT46R51) or 2048 14 (HT46R52) bits, ad-
dressed by the Program Counter and table pointer.
Certain locations in the ROM are reserved for special
usage:
Rev. 1.40
Location 000H
This location is reserved for program initialization. Af-
ter a chip reset, the program always begins execution
at location 000H.
Location 004H
This location is reserved for the external interrupt ser-
vice program. If the INT input pin is activated, the in-
terrupt is enabled and the stack is not full, the program
begins execution at this location.
Location 008H
This location is reserved for the timer/event counter
interrupt service program. If a timer interrupt results
from a timer/event counter overflow, and the interrupt
is enabled and the stack is not full, the program begins
execution at location 008H.
Program Memory
6
Location 00CH
Location 00CH is reserved for the A/D converter inter-
rupt service program. If an A/D converter interrupt re-
sults from an end of A/D conversion, and if the
interrupt is enabled and the stack is not full, the pro-
gram begins execution at location 00CH.
Table location
Any location in the program memory can be used as
look-up tables. The instructions TABRDC [m] (the
current page) and TABRDL [m] (the last page) trans-
fer the contents of the lower-order byte to the speci-
fied data memory, and the higher-order byte to TBLH
(08H). The lower-order byte table pointer TBLP (07H)
are read/write registers, which indicate the table loca-
tions. Before accessing the table, the location has to
be placed in TBLP. The TBLH is read only and cannot
be restored. If the main routine and the ISR (interrupt
service routine) both employ the table read instruc-
tion, the contents of the TBLH in the main routine are
likely to be changed by the table read instruction used
in the ISR. Errors can occur. Given this, using the ta-
ble read instruction in the main routine and the ISR si-
multaneously should be avoided. However, if the table
read instruction has to be applied in both main routine
and the ISR, the interrupt should be disabled prior to
the table read instruction. It will not be enabled until
the TBLH in the main routine has been backed-up. All
table related instructions require 2 cycles to complete
the operation.
HT46R51/HT46R52
July 12, 2005