HT46R52 Holtek Semiconductor, HT46R52 Datasheet - Page 18

• Manufacturer Part Number: HT46R52
• Description: (HT46R51 / HT46R52) A/D Type 8-Bit OTP MCU
• Manufacturer: Holtek Semiconductor

The following two programming examples illustrate how to setup and implement an A/D conversion. In the first exam-
ple, the method of polling the EOCB bit in the ADCR register is used to detect when the conversion cycle is complete,
whereas in the second example, the A/D interrupt is used to determine when the conversion is complete.
Example: using EOCB Polling Method to detect end of conversion
Start_conversion:
Polling_EOC:
Example: using Interrupt Method to detect end of conversion
Start_conversion:
; ADC interrupt service routine
ADC_ISR:
Rev. 1.40
clr
mov
mov
mov
mov
clr
set
clr
sz
jmp
mov
mov
mov
mov
jmp
clr
mov
mov
mov
mov
clr
set
clr
clr
set
set
mov
mov
mov
mov
mov
mov
mov
clr
set
clr
EADI
a,00000001B
ACSR,a
a,00100000B
ADCR,a
:
:
:
START
START
START
EOCB
polling_EOC
a,ADRH
adrh_buffer,a
a,ADRL
adrl_buffer,a
:
:
Start_conversion
EADI
a,00000001B
ACSR,a
a,00100000B
ADCR,a
:
:
START
START
START
ADF
EADI
EMI
:
:
:
acc_stack,a
a,STATUS
status_stack,a
:
:
a,ADRH
adrh_buffer,a
a,ADRL
adrl_buffer,a
START
START
START
:
:
; disable ADC interrupt
; setup the ACSR register to select f
; setup ADCR register to configure Port PB0~PB3 as A/D inputs
; and select AN0 to be connected to the A/D converter
; As the Port B channel bits have changed the following START
; signal (0-1-0) must be issued within 10 instruction cycles
; reset A/D
; start A/D
; poll the ADCR register EOCB bit to detect end of A/D conversion
; continue polling
; read conversion result high byte value from the ADRH register
; save result to user defined memory
; read conversion result low byte value from the ADRL register
; save result to user defined memory
; start next A/D conversion
; disable ADC interrupt
; setup the ACSR register to select f
; setup ADCR register to configure Port PB0~PB3 as A/D inputs
; and select AN0 to be connected to the A/D converter
; As the Port B channel bits have changed the following START
; signal (0-1-0) must be issued within 10 instruction cycles
; reset A/D
; start A/D
; clear ADC interrupt request flag
; enable ADC interrupt
; enable global interrupt
; save ACC to user defined memory
; save STATUS to user defined memory
; read conversion result high byte value from the ADRH register
; save result to user defined register
; read conversion result low byte value from the ADRL register
; save result to user defined register
; reset A/D
; start A/D
18
SYS
SYS
/8 as the A/D clock
/8 as the A/D clock
HT46R51/HT46R52
July 12, 2005