HT46C47 Holtek Semiconductor, HT46C47 Datasheet - Page 16

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HT46C47

Manufacturer Part Number
HT46C47
Description
(HT46C46 / HT46C47) Cost-Effective A/D Type 8-Bit MCU
Manufacturer
Holtek Semiconductor
Datasheet

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In the case of timer/event counter OFF condition, writing
data to the timer/event counter preload register will also
reload that data to the timer/event counter. But if the
timer/event counter is turned on, data written to it will
only be kept in the timer/event counter preload register.
The timer/event counter will still operate until overflow
occurs. When the timer/event counter (reading TMR) is
read, the clock will be blocked to avoid errors. As clock
blocking may results in a counting error, this must be
taken into consideration by the programmer.
The bit0~bit2 of the TMRC can be used to define the
pre-scaling stages of the internal clock sources of
timer/event counter. The definitions are as shown. The
overflow signal of timer/event counter can be used to
generate the PFD signal.
Input/Output Ports
There are 13 bidirectional input/output lines in the
microcontroller, labeled as PA, PB and PD, which are
mapped to the data memory of [12H], [14H] and [18H]
Rev. 1.00
Timer/Event Counter
Input/Output Ports
HT46R46/HT46C46/HT46R47/HT46C47
16
respectively. All of these I/O ports can be used for input
and output operations. For input operation, these ports
are non-latching, that is, the inputs must be ready at the
T2 rising edge of instruction MOV A,[m] (m=12H, 14H
or 18H). For output operation, all the data is latched and
remains unchanged until the output latch is rewritten.
Each I/O line has its own control register (PAC, PBC,
PDC) to control the input/output configuration. With this
control register, CMOS output or Schmitt trigger input
with or without pull-high resistor structures can be re-
configured dynamically (i.e. on-the-fly) under software
control. To function as an input, the corresponding latch
of the control register must write 1 . The input source
also depends on the control register. If the control regis-
ter bit is 1 , the input will read the pad state. If the con-
trol register bit is 0 , the contents of the latches will
move to the internal bus. The latter is possible in the
read-modify-write instruction.
December 28, 2004

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