IDT7201LA35TP IDT, Integrated Device Technology Inc, IDT7201LA35TP Datasheet - Page 9
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IDT7201LA35TP
Manufacturer Part Number
IDT7201LA35TP
Description
IC MEM FIFO 512X9 35NS 28-PDIP
Manufacturer
IDT, Integrated Device Technology Inc
Series
7200r
Datasheet
1.IDT7202LA15J.pdf
(14 pages)
Specifications of IDT7201LA35TP
Function
Asynchronous
Memory Size
4.6K (512 x 9)
Access Time
35ns
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
28-DIP (0.300", 7.62mm)
Configuration
Dual
Density
4.5Kb
Access Time (max)
35ns
Word Size
9b
Organization
512x9
Sync/async
Asynchronous
Expandable
Yes
Bus Direction
Uni-Directional
Package Type
PDIP
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Supply Current
80mA
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
28
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Rate
-
Lead Free Status / Rohs Status
Not Compliant
Other names
7201LA35TP
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT7201LA35TP
Manufacturer:
IDT
Quantity:
20 000
OPERATING MODES:
each system (i.e. FF is monitored on the device where W is used; EF is monitored
on the device where R is used). For additional information, refer to Tech Note
8: Operating FIFOs on Full and Empty Boundary Conditions and Tech Note
6: Designing with FIFOs.
SINGLE DEVICE MODE
requirements are for 256/512/1,024 words or less. These devices are in a
Single Device Configuration when the Expansion In (XI) control input is
grounded (see Figure 12).
DEPTH EXPANSION
the requirements are for greater than 256/512/1,024 words. Figure 14
demonstrates Depth Expansion using three IDT7200/7201A/7202As. Any
XI
W
R
HF
XO
IDT7201L/7201LA/7202LA CMOS ASYNCHRONOUS FIFO
256 x 9, 512 x 9 and 1,024 x 9
W
W
R
R
A single IDT7200/7201A/7202A may be used when the application
The IDT7200/7201A/7202A can easily be adapted to applications when
Care must be taken to assure that the appropriate flag is monitored by
HALF-FULL OR LESS
LAST PHYSICAL
LOCATION
WRITE TO
t
t
XIS
XOL
t
XI
FIRST PHYSICAL
LOCATION
WRITE TO
t
WHF
t
XOH
Figure 9. Half-Full Flag Timing
t
XIR
Figure 10. Expansion Out
Figure 11. Expansion In
MORE THAN HALF-FULL
9
depth can be attained by adding additional IDT7200/7201A/7202As. These
FIFOs operate in the Depth Expansion mode when the following conditions
are met:
1. The first device must be designated by grounding the First Load (FL) control
2. All other devices must have FL in the HIGH state.
3. The Expansion Out (XO) pin of each device must be tied to the Expansion
4. External logic is needed to generate a composite Full Flag (FF) and Empty
5. The Retransmit (RT) function and Half-Full Flag (HF) are not available in
FIFO Modules.
For additional information, refer to Tech Note 9: Cascading FIFOs or
input.
In (XI) pin of the next device. See Figure 14.
Flag (EF). This requires the ORing of all EFs and ORing of all FFs (i.e.
all must be set to generate the correct composite FF or EF). See Figure
14.
the Depth Expansion Mode.
LAST PHYSICAL
READ FROM
LOCATION
t
XIS
t
XOL
FIRST PHYSICAL
READ FROM
LOCATION
t
COMMERCIAL, INDUSTRIAL AND MILITARY
RHF
t
XOH
HALF-FULL OR LESS
TEMPERATURE RANGES
OCTOBER 22, 2008
2679 drw 12
2679 drw 11
2679 drw 13