TDA8029 Philips Semiconductors, TDA8029 Datasheet - Page 45

• Manufacturer Part Number: TDA8029
• Description: Low power single card reader
• Manufacturer: Philips Semiconductors

Philips Semiconductors
When in Power-down or Sleep mode, card extraction or
insertion, overcurrent on V
or RESET will wake up the chip.
The same occurs in case of a falling edge on RX if bit
ENRX is set, or on INT1_N if bit ENINT1 is set and if
INT1_N is enabled within the controller.
If only INT1_N should wake up the TDA8029, then INT1_N
must be enabled in the controller, and ENINT1 only should
be set.
If RX should wake up the TDA8029, then INT1_N must be
enabled in the controller, and ENRX and ENINT1 should
be set.
In case of wake up by RX, then the first received
characters may be lost, depending on the baud rate on the
serial link. (The controller waits for 1536 clock cycles
before leaving Power-down mode).
For more details about the use of these modes, please
refer to the application notes “AN00069” and “AN01005” .
8.16
When the card is inactive, V
LOW, with low impedance with respect to GNDC. The
DC/DC converter is stopped.
2003 Oct 30
handbook, full pagewidth
Low power single card reader
Activation sequence
START
RSTIN
V CC
V UP
RST
CLK
I/O
CC
CC
, or HIGH level on pins RST
t 0
, CLK, RST and I/O are
t 1
t 2
Fig.12 Activation sequence.
t 3
t 4 = t act
45
When everything is satisfactory (voltage supply, card
present and no hardware problems), the system controller
may initiate an activation sequence of the card. Figure 12
shows the activation sequence.
After leaving the UART reset mode, and then configuring
the necessary parameters for the UART, it may set the bit
START in register PCR (t
take place:
After a number of clock pulses that can be counted with the
time out counter, bit RSTIN may be set by software, then
pin RST rises to V
The sequencer is clocked by
interval T of 25 s typical. Thus t
t
2
= t
The DC/DC converter is started (t
V
rise time of 0.17 V/ s typically (t
I/O rises to V
CLK is sent to the card and RST is enabled (t
CC
1
+
starts rising from 0 to 5 V or 3 V with a controlled
3
/
2
T, t
3
CC
= t
CC
1
(t
3
+
.
), (Integrated 14 k pull-up to V
7
/
2
T, and t
0
). The following sequence will
1
/
64
4
1
f
int
= t
ATR
= 0 to
2
)
FCE684
1
which leads to a time
1
Product specification
)
+ 4T.
3
TDA8029
/
64
T,
4
).
CC
)