TDA8029 Philips Semiconductors, TDA8029 Datasheet - Page 33

• Manufacturer Part Number: TDA8029
• Description: Low power single card reader
• Manufacturer: Philips Semiconductors

Philips Semiconductors
8.10.2.3
This register relates the status of the card presence contact PR1, the BGT counter, the FIFO empty indication, the
transmit/receive ready indicator TBE/RBF and the completion of clock switching to or from
No bit within register MSR act upon INT0_N.
Table 48 Mixed status register, address Ch, read
Table 49 Description of register bits
2003 Oct 30
Symbol
Reset value
Low power single card reader
4 and 3
BIT
BIT
7
6
5
2
1
Mixed Status Register (MSR)
CLKSW
FE
BGT
PR1
SYMBOL
CLKSW
7
Clock Switch. CLKSW is set when the TDA8029 has performed a required clock switch
from
switch from
power-down mode or restarting sending commands after leaving power-down (only
needed when the clock is not stopped during power-down). This bit is also reset by RIU
and at power-on. When the microcontroller wants to transmit a character to the card, it
writes the data in direct convention to this register.
FIFO Empty. FE is set when the reception FIFO is empty. It is reset when at least one
character has been loaded in the FIFO.
Block Guard Time.
In T = 1 protocol, the bit BGT is linked with a 22 ETU counter, which is started at every
start-bit on pin I/O. If the count is finished before the next start-bit, BGT is set. This helps
checking that the card has not answered before 22 ETU after the last transmitted
character, or that the reader is not transmitting a character before 22 ETU after the last
received character.
In T = 0 protocol, the bit BGT is linked to a 16 ETU counter, which is started at every
start-bit on I/O. If the count is finished before the next start-bit, then the bit BGT is set.
This helps checking that the reader is not transmitting too early after the last received
character.
Not used.
Presence 1. PR1 = 1 when the card is present.
Not used.
FE
6
1
1
/
n
f
XTAL
1
to
/
2
f
int
1
BGT
/
2
to
5
0
f
int
1
and is reset when the TDA8029 has performed a required clock
/
n
f
XTAL
. The application shall wait this bit before entering
33
4
DESCRIPTION
3
PR1
2
1
/
2
f
int
.
Product specification
1
0
TDA8029
TBE/RBF
0
0