MCP2510-EP Microchip Technology, MCP2510-EP Datasheet - Page 55

• Manufacturer Part Number: MCP2510-EP
• Description: Stand-Alone CAN Controller with SPI Interface
• Manufacturer: Microchip Technology

10.0
The register map for the MCP2510 is shown in
Table 10-1. Address locations for each register are
determined by using the column (higher order 4 bits)
and row (lower order 4 bits) values. The registers have
been arranged to optimize the sequential reading and
TABLE 10-1: CAN Controller Register Map
TABLE 10-2: Control Register Summary
TXRTSCTRL
RXB0CTRL
RXB1CTRL
TXB0CTRL
TXB1CTRL
TXB2CTRL
Address Bits
CANCTRL
BFPCTRL
CANSTAT
CANINTE
CANINTF
Note:
Register
1999 Microchip Technology Inc.
Name
CNF3
CNF2
CNF1
EFLG
REC
TEC
Lower
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
REGISTER MAP
Shaded register locations indicate that these allow the user to manipulate individual bits using the ‘Bit Modify’
Command
Address
(Hex)
0C
0D
xE
1C
1D
2A
2B
2C
2D
xF
28
29
30
40
50
60
70
TXRTSCTRL
RXF0SIDH
RXF1SIDH
RXF2SIDH
x000 xxxx
RXF0SIDL
RXF0EID8
RXF0EID0
RXF1SIDL
RXF1EID8
RXF1EID0
RXF2SIDL
RXF2EID8
RXF2EID0
CANCTRL
BFPCTRL
CANSTAT
BTLMODE
OPMOD2 OPMOD1 OPMOD0
REQOP2
RX1OVR
MERRE
MERRF
SJW1
Bit 7
–
–
–
–
–
–
–
–
RXF3SIDH
RXF4SIDH
RXF5SIDH
x001 xxxx
RXF3SIDL
RXF3EID8
RXF3EID0
RXF4SIDL
RXF4EID8
RXF4EID0
RXF5SIDL
RXF5EID8
RXF5EID0
CANCTRL
CANSTAT
REC
TEC
REQOP1 REQOP0
RX0OVR
WAKFIL
WAKIE
WAKIF
RXM1
RSM1
SJW0
ABTF
ABTF
ABTF
Bit 6
SAM
–
–
RXM0SIDH
RXM1SIDH
RXM0SIDL
RXM0EID8
RXM0EID0
RXM1SIDL
RXM1EID8
RXM1EID0
x010 xxxx
CANCTRL
CANSTAT
PHSEG12 PHSEG11 PHSEG10 PRSEG2
CANINTE
CANINTF
B1BFS
B2RTS
ERRIE
ERRIF
MLOA
MLOA
MLOA
RXM0
RXM0
CNF3
CNF2
CNF1
EFLG
BRP5
TXBO
Bit 5
–
Preliminary
Higher Order Address Bits
Transmit Error Counter
Receive Error Counter
TXERR
TXERR
TXERR
B0BFS
B1RTS
x0011 xxxx
TXB0CTRL
TX2IE
TX2IF
TXEP
ABAT
BRP4
TXB0SIDH
TXB0SIDL
TXB0EID8
TXB0EID0
CANCTRL
Bit 4
TXB0DLC
CANSTAT
TXB0D0
TXB0D1
TXB0D2
TXB0D3
TXB0D4
TXB0D5
TXB0D6
TXB0D7
–
–
–
–
writing of data. Some specific control and status regis-
ters allow individual bit modification using the SPI Bit
Modify command. The registers that allow this com-
mand are shown as shaded locations in Table 10-1. A
summary of the MCP2510 control registers is shown in
Table 10-2.
TXREQ
TXREQ
TXREQ
RXRTR
RXRTR
B0RTS
B1BFE
ICOD2
TX1IE
TX1IF
RXEP
BRP3
Bit 3
–
–
TXB1CTRL
TXB1SIDH
x100 xxxx
TXB1SIDL
TXB1EID8
TXB1EID0
CANCTRL
TXB1DLC
CANSTAT
TXB1D0
TXB1D1
TXB1D2
TXB1D3
TXB1D4
TXB1D5
TXB1D6
TXB1D7
PHSEG22 PHSEG21 PHSEG20 -0-- -000
B2RTSM
TXWAR
FILHIT2
CLKEN
B0BFE
ICOD1
TX0IE
BRP2
TX0IF
BUKT
Bit 2
–
–
–
TXB2CTRL
TXB2SIDH
x101 xxxx
TXB2SIDL
TXB2EID8
TXB2EID0
CANCTRL
TXB2DLC
CANSTAT
TXB2D0
TXB2D1
TXB2D2
TXB2D3
TXB2D4
TXB2D5
TXB2D6
TXB2D7
CLKPRE1 CLKPRE0 1110 -111
B1RTSM
PRSEG1
RXWAR
FILHIT1
B1BFM
ICOD0
RX1IE
RX1IF
BUKT
BRP1
TXP1
TXP1
TXP1
Bit 1
MCP2510
RXB0CTRL
RXB0SIDH
RXB0EID0
x110 xxxx
RXB0SIDL
RXB0EID8
CANCTRL
RXB0DLC
CANSTAT
RXB0D0
RXB0D1
RXB0D2
RXB0D3
RXB0D4
RXB0D5
RXB0D6
RXB0D7
B0RTSM --xx x000
PRSEG0 0000 0000
EWARN
FILHIT0
FILHIT0
B0BFM
RX0IE
RX0IF
BRP0
TXP0
TXP0
TXP0
Bit 0
–
DS21291C-page 55
--00 0000
100- 000-
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
-000 0-00
-000 0-00
-000 0-00
-00- 0000
-00- 0000
RXB1CTRL
RXB1SIDH
RXB1SIDL
RXB1EID8
RXB1EID0
x111 xxxx
CANCTRL
RXB1DLC
CANSTAT
POR/RST
RXB1D0
RXB1D1
RXB1D2
RXB1D3
RXB1D4
RXB1D5
RXB1D6
RXB1D7
Value