MCP2510-EP Microchip Technology, MCP2510-EP Datasheet - Page 36

• Manufacturer Part Number: MCP2510-EP
• Description: Stand-Alone CAN Controller with SPI Interface
• Manufacturer: Microchip Technology

MCP2510
5.1
The Time Quanta is a fixed unit of time derived from the
oscillator period. There is a programmable baud-rate
prescaler, with integral values ranging from 1 to 64, in
addition to a fixed divide by two for clock generation.
Time quanta is defined as:
T
where Baud Rate is the binary value represented by
CNF1.BRP<5:0>
For some examples:
If Fosc = 16 MHz, BRP<5:0> = 00h, and Nominal Bit
Time = 8 T
If F
Time = 8 T
If Fosc = 25 MHz, BRP<5:0> = 3Fh, and Nominal Bit
Time = 25 T
The frequencies of the oscillators in the different nodes
must be coordinated in order to provide a system-wide
specified nominal bit time. This means that all oscilla-
tors must have a T
should also be noted that although the number of T
programmable from 4 to 25, the usable minimum is 6
T
is not guaranteed to operate correctly
5.2
This part of the bit time is used to synchronize the var-
ious CAN nodes on the bus. The edge of the input sig-
nal is expected to occur during the sync segment. The
duration is 1 T
5.3
This part of the bit time is used to compensate for phys-
ical delay times within the network. These delay times
consist of the signal propagation time on the bus line
and the internal delay time of the nodes. The delay is
calculated as being the round trip time from transmitter
to receiver (twice the signal’s propagation time on the
bus line), the input comparator delay, and the output
driver delay. The length of the Propagation Segment
can be programmed from 1 T
PRSEG2:PRSEG0 bits of the CNF2 register (Table
6-2).
DS21291C-page 36
Q
Q.
then T
then T
then T
= 2 * (Baud Rate +1) * T
OSC
Attempting to a bit time of less than 6 T
= 20 MHz, BRP<5:0> = 01h, and Nominal Bit
Q
Q
Q
Time Quanta
Synchronization Segment
Propagation Segment
= 200nsec and Nominal Bit Rate = 625 Kb/s
= 5.12 usec and Nominal Bit Rate = 7.8 Kb/s
= 125 nsec and Nominal Bit Rate = 1 Mb/s
Q
Q
Q
;
;
;
Q
.
OSC
that is a integral divisor of T
OSC
Q
to 8 T
Q
by setting the
Q
in length
Q
Preliminary
Q
. It
is
The total delay is calculated from the following individ-
ual delays:
5.4
The Phase Buffer Segments are used to optimally locate
the sampling point of the received bit within the nominal
bit time. The sampling point occurs between phase seg-
ment 1 and phase segment 2. These segments can be
lengthened or shortened by the resynchronization pro-
cess (see Section 5.7.2). Thus, the variation of the val-
ues of the phase buffer segments represent the DPLL
functionality. The end of phase segment 1 determines
the sampling point within a bit time. phase segment 1 is
programmable from 1 T
ment 2 provides delay before the next transmitted data
transition and is also programmable from 1 T
duration (however due to IPT requirements the actual
minimum length of phase segment 2 is 2 T
tion 5.6 below), or it may be defined to be equal to the
greater of phase segment 1 or the Information Process-
ing Time (IPT). (see Section 5.6).
5.5
The Sample Point is the point of time at which the bus
level is read and value of the received bit is determined.
The Sampling point occurs at the end of phase seg-
ment 1. If the bit timing is slow and contains many T
it is possible to specify multiple sampling of the bus line
at the sample point. The value of the received bit is
determined to be the value of the majority decision of
three values. The three samples are taken at the sam-
ple point, and twice before with a time of T
each sample.
5.6
The Information Processing Time (IPT) is the time seg-
ment, starting at the sample point, that is reserved for
calculation of the subsequent bit level. The CAN speci-
fication defines this time to be less than or equal to 2 T
The MCP2510 defines this time to be 2 T
segment 2 must be at least 2 T
- 2 * physical bus end to end delay; T
- 2 * input comparator delay; T
- 2 * output driver delay; T
- 1 * input to output of CAN controller; T
- T
- Prop_Seg = T
on application circuit)
application circuit)
(maximum defined as 1 T
+ T
PROPOGATION
CAN
Phase Buffer Segments
Sample Point
Information Processing Time
PROPOGATION
= 2 * (T
Q
to 8 T
1999 Microchip Technology Inc.
BUS
DRIVE
Q
Q
+ T
Q
in duration. Phase seg-
+ delay ns)
/ T
long.
COMP
COMP
Q
(depends on
(depends
Q
+ T
BUS
. Thus, phase
Q
Q
CAN
DRIVE
Q
/2
- see Sec-
to 8 T
between
)
Q
Q
Q
in
,
.