TDA19989 NXP Semiconductors, TDA19989 Datasheet - Page 26

• Manufacturer Part Number: TDA19989
• Description: 150 MHz pixel rate HDMI 1.3 transmitter
• Manufacturer: NXP Semiconductors

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NXP Semiconductors
TDA19989_1
Preliminary data sheet
7.12.2 Clock
7.12.3 CEC interrupt
CEC clock must be running in Sleep mode (with CEC) to wake up TDA19989 using CEC
specific message as described in “HDMI specification 1.3a”.
CEC module can be clocked using:
CEC operates normally (i.e. matches the timing requested CEC specification) if and only if
its clock frequency is set to 12 MHz.
Calibration procedure is completely handled by the software delivered together with the
device, it has the following steps:
CEC clock calibration must be performed at each power-up and each time TDA19989
moves from Standby or Sleep (without CEC) state to normal operating mode.
Non successful calibration will lead to CEC signal not matching timings specification; as a
consequence, CEC will not be functional.
Pin INT is used by TDA19989 to warn the host processor that HDMI or CEC events (CEC
message is available to read) have occurred.
Software interrupt status register reads determine which block between HDMI or CEC has
raised the interruption before processing it.
Fig 16. Modules involved in CEC clock calibration process
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External clock:
– 12 MHz crystal ± 1 %.
Internal clock:
– FRO (Free Running Oscillator). FRO frequency varies and in the range from
Host processor set TDA19989 in calibration mode
Host processor generates a negative pulse of 10 ms ± 1 % on INT pin
Host processor deselects the calibration mode when it is completed, the chip is ready
to operate
12.64 MHz to 12.9 MHz. See
Rev. 01 — 15 February 2010
CEC clock calibration module
FRO
HOST PROCESSOR
INT
DIVIDER
HDMI 1.3 transmitter with HDCP and CEC support
Figure
TDA19989
I
2
I
2
C-bus
16.
C-bus
CEC CLK
12 MHz
MODULE
CEC
001aal265
TDA19989
© NXP B.V. 2010. All rights reserved.
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