IDT82V3280 Integrated Device Technology, IDT82V3280 Datasheet - Page 46

• Manufacturer Part Number: IDT82V3280
• Description: Wan Pll
• Manufacturer: Integrated Device Technology

3.17
required to minimize supply noise modulation of the output clocks. The
common sources of power supply noise are switch power supplies and
the high switching noise from the outputs to the internal PLL. The
82V3280 provides separate VDDA power pins for the internal analog
PLL, VDD_DIFF for the differential output driver circuit and VDDD pins
for the core logic as well as I/O driver circuits.
ing regulator, the power supply output should be filtering with sufficient
bulk capacity to minimize ripple and 0.1 uF (0402 case size, ceramic)
caps to filter out the switching transients.
and VDDD are handled individually. VDDD, VDD_AMI, VDD_DIFF and
VDDA should be individually connected to the power supply plane
through vias, and bypass capacitors should be used for each pin.
Figure 14 illustrated how bypass capacitor and ferrite bead should be
connected to power pins.
Functional Description
IDT82V3280
3.3V
To achieve optimum jitter performance, power supply filtering is
To minimize switching power supply noise generated by the switch-
For the 82V3280, the decoupling for VDDA, VDD_DIFF, VDD_AMI
SLF7028T-100M1R1
POWER SUPPLY FILTERING TECHNIQUES
10 µF
3.3V
SLF7028T-100M1R1
0.1 µF
10 µF
0.1 µF
Figure 14. IDT82V3280 Power Decoupling Scheme
0.1 µF
0.1 µF
0.1 µF
0.1 µF
0.1 µF
0.1 µF
0.1 µF
0.1 µF
0.1 µF
46
0.1 µF
impedance. This can be achieved by using one 10 uF (1210 case size,
ceramic) and at least four 0.1 uF (0402 case size, ceramic) capacitors in
parallel. The 0.1 uF (0402 case size, ceramic) capacitors must be
placed right next to the VDDA and VDD_DIFF pins as close as possible.
Note that the 10 uF capacitor must be of 1210 case size, and it must be
ceramic for lowest ESR (Effective Series Resistance) possible. The 0.1
uF should be of case size 0402, this offers the lowest ESL (Effective
Series Inductance) to achieve low impedance towards the high speed
range.
ceramic) and one 10 uF (1210 case size, ceramic) capacitors are rec-
ommended. The 0.1 uF capacitors should be placed as close to the
VDDD pins as possible.
0.1 µF
The analog power supply VDDA and VDD_DIFF should have low
For VDDD and VDD_AMI, at least ten 0.1 uF (0402 case size,
Please refer to evaluation board schematic for details.
VDD_DIFF
VDD_AMI
VDDA
VDDD
IDT82V3280
26
6, 19, 91
12, 13, 16, 50, 61, 85, 86
33, 39
11, 14, 15, 62, 84, 87
1, 5, 20, 92
32, 38
29
GND_DIFF
GND_AMI
DGND
AGND
June 19, 2006
WAN PLL