IDT72T6480 Integrated Device Technology, IDT72T6480 Datasheet - Page 14

• Manufacturer Part Number: IDT72T6480
• Description: X48 Sequential Flow-control Device Up To 1gigabit
• Manufacturer: Integrated Device Technology

TABLE 4 – SFC TO DDR SDRAM INTERFACE CONNECTIONS
IDT72T6480 2.5V, SEQUENTIAL FLOW-CONTROL DEVICE
x12, x24, x48 BIT WIDE CONFIGURATION
SFC
IDT
CONFIGURATION 2
SFC Outputs DDR SDRAM
DQ[15:0]
DQS0
DQS1
A[12:0]
CK, CK
RAS, CAS
BA[1:0]
WE
DDR SDRAM Hard wired pins
CKE → V
CS → GND
LDM → GND
UDM → GND
SFC Hard wired pins
DQ[63:16] → V
DQS[7:2] → V
SFC
CONFIGURATION 1
IDT
SFC Outputs DDR SDRAM
DQ[31:0]
DQS[3:0]
A[11:0]
CK, CK
RAS, CAS
BA[1:0]
WE
DDR SDRAM Hard wired pins
CKE → V
CS → GND
DM[3:0] → GND
SFC Hard wired pins
DQ[63:32] → V
DQS[7:4] → V
A12 → V
Address Bus
CC
Data Bus
CC
CC
Address Bus
16
13
Data Bus
CC
CC
DQ[15:0]
LDQS
UDQS
A[12:0]
CK, CK
RAS, CAS
BA[1:0]
WE
CC
32
12
CC
DQ[31:0]
DQS[3:0]
A[11:0]
CK, CK
RAS, CAS
BA[1:0]
WE
SDRAM
256Mb
DDR
128Mb or
SDRAM
256Mb
DDR
6358 drw05
6358 drw04
14
CONFIGURATION 4
SFC Outputs DDR SDRAM #1
DQ[31:0]
DQ[35:32]
DQ[63:36]
DQS[3:0]
DQS[7:4]
A[11:0]
CK, CK
RAS, CAS
BA[1:0]
WE
DDR SDRAM Hard wired pins
CKE → V
CS → GND
DM[3:0] → GND
DQ[31:4] → V
SFC Hard wired pins
A12 → V
CONFIGURATION 3
SFC Outputs DDR SDRAM #1 DDR SDRAM #2
DQ[31:0]
DQ[63:32]
DQS[3:0]
DQS[7:4]
A[11:0]
CK, CK
RAS, CAS
BA[1:0]
WE
DDR SDRAM Hard wired pins
CKE → V
CS → GND
DM[3:0] → GND
SFC Hard wired pins
A12 → V
SFC
SFC
IDT
IDT
CC
CC
CC
CC
CC
DQ[31:0]
--
--
DQS[3:0]
--
A[11:0]
CK, CK
RAS, CAS
BA[1:0]
WE
Data Bus
Data Bus
Address Bus
DQ[31:0]
--
DQS[3:0]
--
A[11:0]
CK, CK
RAS, CAS
BA[1:0]
WE
Address Bus
36
64
12
12
32
32
32
4
COMMERCIAL AND INDUSTRIAL
12
12
DDR SDRAM #2
--
DQ[3:0]
--
--
DQS[3:0]
A[11:0]
CK, CK
RAS, CAS
BA[1:0]
WE
TEMPERATURE RANGES
--
DQ[31:0]
--
DQS[3:0]
A[11:0]
CK, CK
RAS, CAS
BA[1:0]
WE
128Mb or
128Mb or
SDRAM
SDRAM
256Mb
256Mb
DDR
DDR
OCTOBER 10, 2005
6358 drw06
6358 drw07