SC26C94C1N Philips Semiconductors, SC26C94C1N Datasheet - Page 23

• Manufacturer Part Number: SC26C94C1N
• Description: Quad universal asynchronous receiver/transmitter QUART
• Manufacturer: Philips Semiconductors

Philips Semiconductors
AC ELECTRICAL CHARACTERISTICS
NOTES:
1. Stress above these listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only.
2. For operating at elevated temperatures, the device must be derated based on +150
3. This product includes circuitry specifically designed for the protection of its internal devices from damaging effects of excessive static
4. Parameters are valid over specified temperature range. See ordering information table for applicable temperature range and operating
5. All voltage measurements are referenced to ground (GND). For testing, all inputs swing between 0.4V and 2.4V with a transition time of 20ns
6. Typical values are at +25
7. Test condition for interrupt and I/O outputs: C
8. Timing is illustrated and referenced to the WRN and RDN inputs. The device may also be operated with CEN as the ‘strobing’ input. CEN
9. This value is not tested, but is guaranteed by design. For t
1995 May 1
Reset timing
t
I/O Port timing
t
t
t
Interrupt timing
t
Clock timing
t
t
t
t
f
t
f
t
f
Transmitter timing
t
t
Receiver timing
t
t
SYMBOL
SYMBOL
RES
PS
PH
PD
IR
CLK
CLK
CLK
CTC
CTC
RX
RX
TX
TX
TXD
TCS
RXS
RXH
Quad universal asynchronous receiver/transmitter (QUART)
Functional operation of the device at these or any other condition above those indicated in the operation section of the specification is not
implied.
charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying any voltages larger than the rated maxima.
supply range.
maximum. For X1/CLK this swing is between 0.4V and 4.4V. All time measurements are referenced at input voltages of V
appropriate.
and RDN (also CEN and WRN) are ANDed internally. As a consequence, the signal asserted last initiates the cycle and the signal negated
first terminates the cycle.
FIGURE
FIGURE
10
10
10
10
10
10
10
10
10
12
12
11
11
7
8
8
8
9
Reset pulse width
I/O input setup time before RDN Low
I/O input hold time after RDN High
I/O output valid from
IRQN negated or I/O output High from:
X1/CLK low/high time
X1/CLK low/high time (above 4MHz; X1/CLK
X1/CLK frequency
Counter/timer clock high or low time
Counter/timer clock frequency
RxC high or low time
RxC frequency (16X)
RxC frequency (1X)
TxC high or low time
TxC frequency (16X)
TxC frequency (1X)
TxD output delay from TxC low
TxC output delay from TxD output data
RxD data setup time to RxC high
RxD data hold time from RxC high
Reset command (break change interrupt)
Stop C/T command (counter interrupt)
Read RHR (RxRDY/FFULL interrupt)
Write THR (TxRDY interrupt)
Reset command (I/O change interrupt)
Write IMR (clear of interrupt mask bit)
WRN High
RDN Low
o
C, typical supply voltages, and typical processing parameters.
L
= 50pF, R
5, 6, 7, 8
PARAMETER
PARAMETER
L
= 2.7k to V
CLK
minimum test rate is 2.0MHz.
23
2 active)
CC
With respect to a
3.6864MHz clock
on pin X1/CLK
. Test conditions for rest of outputs: C
o
C maximum junction temperature.
125/100
56/56
Min
200
–20
100
100
0
60
0
30
0
0
30
0
0
0
0
9
9
9
9
9
9
LIMITS
3.6864
Typ
L
= 150pF.
Max
110
110
100
100
100
100
100
100
120
+20
Product specification
8.0
1.0
1.0
16
16
SC26C94
8
IL
and V
IH
UNIT
UNIT
MHz
MHz
MHz
MHz
MHz
MHz
, as
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns