T4312816A Taiwan Memory Technology, T4312816A Datasheet - Page 25

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T4312816A

Manufacturer Part Number
T4312816A
Description
8M x 16 SDRAM
Manufacturer
Taiwan Memory Technology
Datasheet
tm
Burst Read Single bit Write Cycle @ Burst Length = 2
*Note : 1. BRSW modes is enabled by setting A
TM Technology Inc. reserves the right
to change products or specifications without notice.
D Q
C L O C K
A 1 0 / A P
A D D R
C K E
R A S
C A S
D Q M
C L = 2
C L = 3
C S
B A
W E
2. When BRSW write command with auto precharge is executed, keep it in mind that
At the BRSW Mode, the burst length at write is fixed to ‘1’ regardless of programmed burst length.
0
be violated.
Auto precharge is executed at the next cycle of burst-end, so in the case of BRSW write command,
the precharge command will be issued after two clock cycle.
R o w A c t i v e
CH
( A - B a n k )
TE
R A a
R A a
1
2
3
W r i t e ( A -
B a n k )
C A a
D A a 0
D A a 0
4
R o w A c t i v e
( A - B a n k )
R B b
R B b
5
R e a d w i t h A u t o
P r e c h a r g e ( A -
C A b
B a n k )
6
7
D A b 0
9
H I G H
‘High’ at MRS (Mode Register Set).
8
D A b 1
D A b 0
P.25
9
D A b 1
1 0
R o w A c t i v e
( A - B a n k )
R A c
R A c
1 1
1 2
W r i t e w i t h A u t o
P r e c h a r g e ( A -
D B c 0
D B c 0
C B c
B a n k )
Preliminary T4312816A
1 3
* N o t e 2
1 4
R e a d ( A -
C A d
B a n k )
Publication Date: APR. 2003
1 5
1 6
D A d 0
1 7
t
RAS
D A d 1
D A d 0
1 8
Revision: 0.B
should not
P r e c h a r g e
( A - B a n k )
D A d 1
: D o n 't c a r e
1 9

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