T4312816A Taiwan Memory Technology, T4312816A Datasheet - Page 11

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T4312816A

Manufacturer Part Number
T4312816A
Description
8M x 16 SDRAM
Manufacturer
Taiwan Memory Technology
Datasheet
tm
Burst Length and Sequence
(Burst of Two)
(Burst of Four)
(Burst of Eight)
8Mx16 divice.
POWER UP SEQUENCE
1. Apply power and start clock, attempt to maintain CKE = ‘H’ , L(U)DQM = ‘H’ and the other pin are NOP
2. Maintain stable power, stable clock and NOP input condition for a minimum of 200us.
3. Issue precharge commands for all banks of the devices.
4. Issue 2 or more auto-refresh commands.
5. Issue mode register set command to initalize the mode register.
TM Technology Inc. reserves the right
to change products or specifications without notice.
(column address A1-A0 binary)
(column address A2-A0 binary)
condition at the inputs.
Cf.) Sequence of 4 & 5 is regardless of the order.
(column address A0 binary)
Full page burst is an extension of the above tables of Sequential Addressing, with the length being 512 for
Starting Address
Starting Address
Starting Address
CH
TE
000
001
010
011
100
101
110
111
00
01
10
11
0
1
Sequential Addressing
Sequential Addressing
Sequential Addressing
Sequence (decimal)
Sequence (decimal)
Sequence (decimal)
0,1,2,3,4,5,6,7
1,2,3,4,5,6,7,0
2,3,4,5,6,7,0,1
3,4,5,6,7,0,1,2
4,5,6,7,0,1,2,3
5,6,7,0,1,2,3,4
6,7,0,1,2,3,4,5
7,0,1,2,3,4,5,6
0,1,2,3
1,2,3,0
2,3,0,1
3,0,1,2
P.11
0,1
1,0
Preliminary T4312816A
Interleave Addressing
Interleave Addressing
Interleave Addressing
Publication Date:APR. 2003
Sequence (Decimal)
Sequence (Decimal)
Sequence (Decimal)
0,1,2,3,4,5,6,7
1,0,3,2,5,4,7,6
2,3,0,1,6,7,4,5
3,2,1,0,7,6,5,4
4,5,6,7,0,1,2,3
5,4,7,6,1,0,3,2
6,7,4,5,2,3,0,1
7,6,5,4,3,2,1,0
0,1,2,3
1,0,3,2
2,3,0,1
3,2,1,0
0,1
1,0
Revision: 0.B

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