T315XW01 AUO, T315XW01 Datasheet - Page 9

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T315XW01

Manufacturer Part Number
T315XW01
Description
WXGA Color TFT-LCD Module
Manufacturer
AUO
Datasheet

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©Copyright AU Optronics, Inc.
January, 2003 All Rights Reserved.
No Reproduction and Redistribution Allowed
This is the signal timing required at the input of the User connector. All of the interface signal timing should be
satisfied with the following specifications for it’s proper operation.
* Timing Table
DE only Mode
*1) DCLK signal input must be valid while power supply is applied.
*2) Display position is specific by the rise of ENAB signal only.
Horizontal display position is specified by the falling edge of 1
ENAB, is displayed on the left edge of the screen.
Vertical display position is specified by the rise of ENAB after a “Low” level period
equivalent to eight times of horizontal period. The 1
line after the rise the of ENAB is displayed at the top line of screen.
3.) If a period of ENAB “High” is less than 1366 DCLK or less than 768 lines, the rest of the
screen displays black.
4.) The display position does not fit to the screen if a period of ENAB “High” and the
effective data period do not synchronize with each other.
Clock
Vsync
Vertical
Horizontal
3-3 Signal Timing Specifications
Item
Freq.
Freq.
TTL
Active
TTL
Active
Symbol
1/Tclk
1/Yv
Tvd
Thd
T315XW01 V0 - Specs. Ver0.1
Min.
1406
774
---
---
---
---
st
1606
1366
Typ.
768
81
60
data corresponding to one horizontal
st
DCLK right after the rise of
Max.
1024
2048
---
---
---
90
DCLK
DCLK
MHz
Unit
Hz
Th
Th
9/24

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