ISL8102 Intersil Corporation, ISL8102 Datasheet - Page 12

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ISL8102

Manufacturer Part Number
ISL8102
Description
Two-Phase Buck PWM Controller
Manufacturer
Intersil Corporation
Datasheet
Voltage Regulation
In order to regulate the output voltage to a specified level, the
ISL8102 uses the integrating compensation network shown in
Figure 6. This compensation network insures that the steady
state error in the output voltage is limited only to the error in
the reference voltage (output of the DAC or the external
voltage reference) and offset errors in the OFS current
source, remote sense and error amplifiers. Intersil specifies
the guaranteed tolerance of the ISL8102 to include the
combined tolerances of each of these elements, except when
an external reference or voltage divider is used, then the
tolerances of these components has to be taken into account.
The ISL8102 incorporates an internal differential remote
sense amplifier in the feedback path. The amplifier removes
the voltage error encountered when measuring the output
voltage relative to the controller ground reference point,
resulting in a more accurate means of sensing output voltage.
Connect the load’s output sense pins to the non-inverting
input, VSEN, and inverting input, RGND, of the remote sense
amplifier. The droop voltage, V
remote sense amplifier. The remote sense output, V
therefore equal to the sum of the output voltage, V
the droop voltage. V
the error amplifier through an external resistor.
FIGURE 6. OUTPUT VOLTAGE AND LOAD-LINE
R
1
V
C
DROOP
EXTERNAL CIRCUIT
SUM
+
-
V
V
OUT
OFS
R
+
+
-
-
2
REGULATION WITH OFFSET ADJUSTMENT
R
C
S1
1
C
DROOP
DIFF
REF
ICOMP
COMP
VDIFF
ISUM
VSEN
RGND
IREF
REF
R
DAC
FB
P1
is connected to the inverting input of
12
DROOP
ISL8102 INTERNAL CIRCUIT
I
OFS
, also feeds into the
VID DAC
+
-
ERROR AMPLIFIER
ISENSE
+
+
-
-
AMP
REMOTE-SENSE
DIFFERENTIAL
AMPLIFIER
+
-
OUT
V
DIFF
COMP
, and
, is
ISL8102
The output of the error amplifier, V
sawtooth waveform to generate the PWM signals. The PWM
signals control the timing of the Internal MOSFET drivers
and regulate the converter output so that the voltage at FB is
equal to the voltage at REF. This will regulate the output
voltage to be equal to Equation 5. The internal and external
circuitry that controls voltage regulation is illustrated in
Figure 6.
Load-Line (Droop) Regulation
In some high current applications, a requirement on a
precisely controlled output impedance is imposed. This
dependence of output voltage on load current is often
termed “droop” or “load line” regulation.
The Droop is an optional feature in the ISL8102. It can be
enabled by connecting ICOMP pin to DROOP pin as shown
in Figure 6. To disable it, connect the DROOP pin to IREF
pin.
As shown in Figure 6, a voltage, V
total current in all active channels, I
differential remote-sense amplifier. The resulting voltage at
the output of the remote-sense amplifier is the sum of the
output voltage and the droop voltage. As Equation 5 shows,
feeding this voltage into the compensation network causes
the regulator to adjust the output voltage so that it’s equal to
the reference voltage minus the droop voltage.
The droop voltage, V
current through the output inductors. This is accomplished
by using a continuous DCR current sensing method.
Inductor windings have a characteristic distributed
resistance or DCR (Direct Current Resistance). For
simplicity, the inductor DCR is considered as a separate
lumped quantity, as shown in Figure 7. The channel current,
I
Equation 6 shows the s-domain equivalent voltage, V
across the inductor.
The inductor DCR is important because the voltage dropped
across it is proportional to the channel current. By using a
simple R-C network and a current sense amplifier, as shown
in Figure 7, the voltage drop across all of the inductors DCRs
can be extracted. The output of the current sense amplifier,
V
currents I
V
V
V DROOP s ( )
L
DROOP
OUT
L
, flowing through the inductor, passes through the DCR.
s ( )
=
=
I
, can be shown to be proportional to the channel
V
L
L1
REF
(
and I
=
s L
------------------------------------------------------------------------- -
(
±
s R COMP C COMP
V
+
L2
OFS
DCR
, shown in Equation 7.
DROOP
-------------
DCR
s L
)
V
DROOP
+
, is created by sensing the
1
DROOP
+
COMP
1
OUT
)
R
-----------------------
, feeds into the
COMP
, is compared to the
, proportional to the
R S
(
I L1
October 19, 2005
+
I L2
L
FN9247.0
(EQ. 6)
(EQ. 7)
(EQ. 5)
,
) DCR

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