ISL6721 Intersil Corporation, ISL6721 Datasheet - Page 17

• Manufacturer Part Number: ISL6721
• Description: Flexible Single Ended Current Mode PWM Controller
• Manufacturer: Intersil Corporation

Regulation Performance
Waveforms
Typical waveforms can be found in Figures 10 through 12.
Figure 10 shows the steady state operation of the sawtooth
oscillator waveform at RTCT (Trace 2), the SYNC output
pulse (Trace 1), and the GATE output to the converter FET
(Trace 3). Figure 11 shows the converter behavior while
operating in an over current fault condition. Trace 1 is the
soft start voltage, which increases from zero to 4.5V, at
which point the OC fault function is enabled. The OC
condition is detected and the soft start capacitor is
I
OUT
0.39
0.88
1.38
1.87
2.39
2.89
3.37
0.39
0.88
1.38
1.87
2.39
2.89
0.39
0.88
1.38
1.87
2.39
0.39
0.88
1.38
1.87
0.39
0.88
1.38
0.39
0.88
(A), 3.3V
TABLE 1. OUTPUT LOAD REGULATION, V
.39
0
0
0
0
0
0
0
I
OUT
0.030
0.030
0.030
0.030
0.030
0.030
0.030
0030
0.52
0.52
0.52
0.52
0.52
0.52
0.52
1.05
1.05
1.05
1.05
1.05
1.05
1.55
1.55
1.55
1.55
1.55
2.07
2.07
2.07
2.07
2.62
2.62
2.62
3.14
3.14
(A), 1.8V V
17
OUT
3.351
3.281
3.251
3.223
3.204
3.185
3.168
3.153
3.471
3.283
3.254
3.233
3.218
3.203
3.191
3.619
3.290
3.254
3.235
3.220
3.207
3.699
3.306
3.260
3.239
3.224
3.762
3.329
3.270
3.245
3.819
3.355
3.282
3.869
3.383
(V), 3.3V V
IN
OUT
= 48V
1.825
1.956
1.988
2.014
2.029
2.057
2.084
2.103
1.497
1.800
1.836
1.848
1.855
1.859
1.862
1.347
1.730
1.785
1.805
1.814
1.820
1.265
1.682
1.750
1.776
1.789
1.201
1.645
1.722
1.752
1.142
1.612
1.697
1.091
1.581
(V), 1.8V
ISL6721
discharged to the 4.375V OC fault threshold at which point
the IC enters the fault shutdown mode. Trace 2 shows the
behavior of the timing capacitor voltage during a shutdown
fault. Most of the functions of the IC are de-powered during a
fault, and the oscillator is among those functions. During a
fault, the IC is turned off until the restart delay has timed out.
After the delay, power is restored and the IC resumes
normal operation. Trace 3 is the GATE output during the soft
start cycle and OC fault.
Figure 12 shows the switching FET waveforms during
steady state operation. Trace 1 is drain - source voltage and
Trace 2 is gate - source voltage.
NOTE:
NOTE:
Trace 1: SYNC Output
Trace 2: RTCT Sawtooth
Trace 3: GATE Output
Trace 1: SS
Trace 2: RTCT Sawtooth
Trace 3: GATE Output
FIGURE 11. SOFT START W/OVER CURRENT FAULT
FIGURE 10. TYPICAL WAVEFORMS