CT2553-PCB Aeroflex Circuit Technology, CT2553-PCB Datasheet - Page 25

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CT2553-PCB

Manufacturer Part Number
CT2553-PCB
Description
Advanced Integrated Mux Aim Hybrid For Mil-std-1553 / Sae-as15531 In Pcb Style
Manufacturer
Aeroflex Circuit Technology
Datasheet
DBAC, RTU/BC, MT, CTLOUT B/A
SSFLAG, SSBUSY, SVCRQST
SCDCT2553PCB Rev A Preliminary 7/13/06
SYMBOL
tpw1
td1
td2
td7
td8
td9
tz
tr
16MHz Clock
(Internal)
MEM/REG
SELECT
READYD
D15-D00
STRBD
RD/WR
1. STRBD to IOEN (low) delay is two clock cycles. If contention occurs, delay is two clock cycles following release of bus.
2. CPU must release STRBD within 1.5µs of IOEN going active. READYD will go away within one clock cycle maximum.
NOTE:
IOEN
A02
A01
A00
FIGURE 28 – CPU WRITES TO INTERNAL REGISTER
DESCRIPTION
READYD low delay (CPU Handshake)
IOEN high delay (CPU Handshake)
READYD pulse width (CPU Handshake)
Internal Register delay (write)
Register Data/Address set-up time
Register Data/Address hold time
READYD to STRBD release
(SELECT
See Note 1
STRBD) to IOEN
tz
25
See Note 2
td1
td8
td7
DATA VALID
MIN
50
-
-
-
-
-
-
-
tr
tpw1
Configuration Register Only
MAX
1.37
150
1.8
DATA LATCHED
20
60
30
0
-
td9
UNITS
Aeroflex Plainview
ns
ns
ns
ns
ns
ns
µs
µs
td2

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