MT28C3224P20 Micron Technology, MT28C3224P20 Datasheet - Page 37

no-image

MT28C3224P20

Manufacturer Part Number
MT28C3224P20
Description
FLASH AND SRAM COMBO MEMORY
Manufacturer
Micron Technology
Datasheet
TIMING TEST CONDITIONS
NOTE: For input/output contacts, refer to the Capacitance Table.
SRAM READ CYCLE TIMING
SRAM WRITE CYCLE TIMING
2 Meg x 16 Page Flash 256K x 16 SRAM Combo Memory
MT28C3224P20_3.p65 – Rev. 3, Pub. 7/02
DESCRIPTION
Read cycle time
Address access time
Chip enable to valid output
Output enable to valid output
Byte select to valid output
Chip enable to Low-Z output
Output enable to Low-Z output
Byte select to Low-Z output
Chip enable to High-Z output
Output disable to High-Z output
Byte select disable to High-Z output
Output hold from address change
DESCRIPTION
Write cycle time
Chip enable to end of write
Address valid to end of write
Byte select to end of write
Address setup time
Write pulse width
Write recovery time
Write to High-Z output
Data to write time overlap
Data hold from write time
End write to Low-Z output
Input pulse levels .................... 0.1V V
Input rise and fall times .................................... 5ns
Input timing reference levels ......................... 0.5V
Output timing reference levels ..................... 0.5V
Operating Temperature ............... -40
CC
o
C to +85
to 0.9V V
t
LBHZ,
t
SYMBOL
LBZ,
t
LB,
o
CC
t
t
C
t
t
t
t
OHZ
t
t
OLZ
t
AA
OH
CO
OE
RC
HZ
LZ
t
t
t
UB
UBZ
UBHZ
37
256K x 16 SRAM COMBO MEMORY
V
CC
MIN
0
0
0
0
0
0
5
= 1.70V–1.90V V
t
LBW,
SYMBOL
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
t
t
t
t
t
t
t
WHZ
t
t
AW
DW
OW
2 MEG x 16 PAGE FLASH
WC
CW
WR
WP
DH
AS
MAX
100
100
100
100
t
35
15
15
15
UBW
-80/-85
CC
MIN
MIN
50
50
0
0
0
0
0
0
5
0
0
0
0
0
= 1.80V–2.20V
-80/-85
MAX
MAX
85
85
85
35
85
15
15
15
85
50
50
50
15
©2002, Micron Technology, Inc.
ADVANCE
UNITS
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

Related parts for MT28C3224P20