MT28C3224P20 Micron Technology, MT28C3224P20 Datasheet - Page 2

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MT28C3224P20

Manufacturer Part Number
MT28C3224P20
Description
FLASH AND SRAM COMBO MEMORY
Manufacturer
Micron Technology
Datasheet
GENERAL DESCRIPTION
nation Flash and SRAM memory devices provide a com-
pact, low-power solution for systems where PCB real
estate is at a premium. The dual-bank Flash devices
are high-performance, high-density, nonvolatile
memory with a revolutionary architecture that can sig-
nificantly improve system performance.
by configuring soft protection registers with dedicated
command sequences. For security purposes, dual 64-
bit chip protection registers are provided.
functions are fully automated by an on-chip write state
machine (WSM). The WSM simplifies these operations
and relieves the system processor of secondary tasks.
An on-chip status register, one for each bank, can be
used to monitor the WSM status to determine the
progress of a PROGRAM/ERASE command.
compatibility with existing EEPROM emulation soft-
ware packages.
source for the Flash memory (F_V
power source for the SRAM memory (S_V
1.70V–2.20V for optimized power consumption and im-
proved noise immunity. A dedicated I/O power supply
(V
2.20V), to allow a direct interface to most common logic
controllers and to ensure improved noise immunity.
2 Meg x 16 Page Flash 256K x 16 SRAM Combo Memory
MT28C3224P20_3.p65 – Rev. 3, Pub. 7/02
CC
The MT28C3224P20 and MT28C3224P18 combi-
This new architecture features:
• A two-memory-bank configuration supporting
• A high-performance bus interface providing a fast
• A conventional asynchronous bus interface.
The devices also provide soft protection for blocks
The embedded WORD WRITE and BLOCK ERASE
The erase/program suspend functionality allows
The devices take advantage of a dedicated power
Q) is provided with an extended range (1.70V–
dual-bank operation;
page data transfer; and
PART NUMBER
MT28C3224P20FL-80 BET
MT28C3224P20FL-80 TET
MT28C3224P18FL-85 BET
MT28C3224P18FL-85 TET
Cross Reference for Abbreviated Device Marks
CC
) and a dedicated
CC
), both at
MARKING
PRODUCT
FW446
FW450
FW448
FW449
Table 1
256K x 16 SRAM COMBO MEMORY
2
The separate S_V
retention capability when required. The data reten-
tion S_V
MT28C3224P20 and MT28C3224P18 devices support
two V
2.2V and a production compatibility voltage of 12V ±5%.
The 12V ±5% V
cycles and 10 cumulative hours.
contain an asynchronous 4Mb SRAM organized as 256K-
words by 16 bits. These devices are fabricated using an
advanced CMOS process and high-speed/ultra-low-
power circuit technology.
age with 0.80mm pitch.
ARCHITECTURE AND MEMORY
ORGANIZATION
banks (bank a and bank b) for simultaneous READ and
WRITE operations. Bank a is 8Mb deep and contains 8
x 4K-word parameter blocks and fifteen 32K-word
blocks. Bank b is 24Mb deep, is equally sectored, and
contains forty-eight 32K-word blocks.
organizations.
DEVICE MARKING
part number is not printed on the top of each device.
Instead, an abbreviated device mark comprised of a
five-digit alphanumeric code is used. The abbreviated
device marks are cross referenced to Micron part num-
bers in Table 1.
MARKING
SAMPLE
FX446
FX450
FX448
FX449
The MT28C3224P20 and MT28C3224P18 devices
The devices are packaged in a 66-ball FBGA pack-
The Flash memory contains two separate memory
Figures 2 and 3 show the top and bottom memory
Due to the size of the package, Micron’s standard
PP
voltage ranges, an in-circuit voltage of 0.9V–
Micron Technology, Inc., reserves the right to change products or specifications without notice.
CC
2 MEG x 16 PAGE FLASH
SAMPLE MARKING
is specified as low as 1.0V. The
PP
MECHANICAL
2
CC
is supported for a maximum of 100
FY448
FY446
FY449
FY450
pin for the SRAM provides data
©2002, Micron Technology, Inc.
ADVANCE

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