SST55LD019A Silicon Storage Technology, Inc., SST55LD019A Datasheet - Page 9

• Manufacturer Part Number: SST55LD019A
• Description: Ata Flash Disk Controllersst's Ata Flash Disk Controller is The Heart of a High Performance, Flash Media-based Data Storage System. The Ata Flash Disk Controller Recognizes The Control, Address, And Data Signals on The Ata/ide Bus And Translates Them
• Manufacturer: Silicon Storage Technology, Inc.

ATA Flash Disk Controller
SST55LD019A / SST55LD019B / SST55LD019C
TABLE
©2004 Silicon Storage Technology, Inc.
Symbol
Host Side Interface
A2
A1
A0
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
DMACK
DMARQ
CS1FX#
CS3FX#
CSEL
IORD#
IOWR#
IOCS16#
INTRQ
PDIAG#
DASP#
RESET#
3-1: P
100-TQFP
53
22
23
65
66
67
68
70
71
72
73
10
11
20
14
24
52
56
19
57
55
21
54
75
IN
3
4
5
6
8
9
1
A
SSIGNMENTS
Pin No.
64-TQFP 84-BGA
33
15
16
40
41
42
43
45
46
47
48
13
11
18
31
36
12
37
35
14
34
50
63
1
2
3
4
6
7
8
9
E10
D10
C10
B10
(1
J10
G3
G2
G1
H1
F8
E9
E8
D9
D8
C3
C4
B2
D4
C2
D3
C1
D2
E3
H2
K9
F1
H9
H8
A2
J8
J9
OF
3)
Type
Pin
I/O
I/O
I/O
O
O
O
I
I
I
I
I
I
I1Z/O2
I1U/O1
I1U/O6
Type
I1Z
I2U
I2Z
I1U
I2Z
I2U
I/O
O1
O2
O1
1
9
Name and Functions
A[2:0] are used to select one of eight registers in the Task File.
D[15:0] Data bus
DMA Acknowledge - input from host
DMA Request to host
CS1FX# is the chip select for the task file registers
Device Control register.
This internally pulled-up signal is used to configure this device
as a Master or a Slave. When this pin is grounded, this device
is configured as a Master. When the pin is open, this device is
configured as a Slave. The pin setting should remain the same
from Power-on to Power-down.
This is an I/O Read strobe generated by the host. This signal
gates I/O data onto the bus from the chip.
The I/O Write strobe pulse is used to clock I/O data into the
chip.
This output signal is asserted low when the device is indicating
a word data transfer cycle.
This signal is the active high Interrupt Request to the host.
The Pass Diagnostic signal in the Master/Slave handshake
protocol.
The Drive Active/Slave Present signal in the Master/Slave
handshake protocol.
This input pin is the active low hardware reset from the host.
CS3FX# is used to select the alternate status register and the
Advance Information
S71241-02-000
4/04