MD5811-d256-MECH M-Systems Inc., MD5811-d256-MECH Datasheet - Page 63

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MD5811-d256-MECH

Manufacturer Part Number
MD5811-d256-MECH
Description
Mobile Diskonchip P3 Data Sheet
Manufacturer
M-Systems Inc.
Datasheet
10.3 Multiplexed Interface
With a multiplexed interface, Mobile DiskOnChip P3 requires the signals shown in Figure 19
below.
10.4 Connecting Control Signals
10.4.1 Standard Interface
When using a standard NOR-like interface, connect the control signals as follows:
60
A[12:0] – Connect these signals to the host’s address signals (see Section 10.8 for
platform-related considerations). Address signal A[0] is multiplexed with the DPD signal.
D[15:0] – Connect these signals to the host’s data signals (see Section 10.8 for platform-related
considerations).
Output Enable (OE#) and Write Enable (WE#) – Connect these signals to the host RD# and
WR# signals, respectively.
Chip Enable (CE#) – Connect this signal to the memory address decoder. Most RISC
processors include a programmable decoder to generate various Chip Select (CS) outputs for
different memory zones. These CS signals can be programmed to support different wait states
to accommodate Mobile DiskOnChip P3 timing specifications.
Power-On Reset In (RSTIN#) – Connect this signal to the host active-low Power-On Reset
signal.
Output Enable
Address/Data
Write Enable
Chip Enable
Chip ID
AVD#
Reset
0.1 uF
Figure 19: Multiplexed System Interface
AD[15:0]
OE#
CE#
ID0
WE#
RSTIN
AVD#
#
10 nF
3.3 V
Data Sheet, Rev. 0.3
DiskOnChip P3
VCC
0.1 uF
Mobile
VSS
DMARQ#
BUSY#
LOCK#
1.8V or 3.3V
10 nF
VCCQ
DPD
IRQ#
CLK
1-20 KOhm
Mobile DiskOnChip P3
93-SR-009-8L

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