MD5811-d256-MECH M-Systems Inc., MD5811-d256-MECH Datasheet - Page 50
MD5811-d256-MECH
Manufacturer Part Number
MD5811-d256-MECH
Description
Mobile Diskonchip P3 Data Sheet
Manufacturer
M-Systems Inc.
Datasheet
1.MD5811-D256-MECH.pdf
(86 pages)
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8.9
Description:
Address (hex): 100A
8.10 Configuration Register
Description:
Address (hex): 100E
47
Read/Write
Description
Reset Value
Read/Write
Description
Reset Value
Bit No.
Bit No.
6, 3-1
1-0
7-2
5-4
0
7
Device ID Select Register
ID[1:0] (Identification). The device whose ID input pins/balls match the value of bits ID[0:1]
responds to read and write cycles to register space.
Reserved for future use.
VCCQ_3V: Reflects the level of VCCQ input.
0: VCCQ < 2.0V
1: VCCQ > 2.5V
Reserved for future use.
MAX_ID (Maximum Device ID). This field controls the Programmable Boot Block address
mapping when multiple devices are used in a cascaded configuration, using the ID[1:0]
inputs. It should be programmed to the highest ID value that is found by software in order to
map all available boot blocks into usable address spaces.
IF_CFG (Interface Configuration). Reflects the state of the IF_CFG input pin.
In a cascaded configuration, this register controls which device provides the
register space. The value of bits ID[0:1] is compared to the value of the ID
configuration input pins/balls. The device whose ID input matches the value of
bits ID[0:1] responds to read and write cycles.
This register indicates the current configuration of Mobile DiskOnChip P3. Unless
otherwise noted, the bits are reset only by a hardware reset, and not upon boot
detection or any other entry to Reset mode.
IF_CFG
Bit 7
Bit 7
X
0
R
RFU_0
Bit 6
Bit 6
0
0
Bit 5
Bit 5
Data Sheet, Rev. 0.3
0
0
MAX_ID
RFU_0
R/W
R
Bit 4
Bit 4
0
Description
Description
0
Bit 3
RFU
Bit 3
0
0
Bit 2
Bit 2
0
0
RFU_0
R
Bit 1
Bit 1
0
0
Mobile DiskOnChip P3
ID[1:0]
R/W
93-SR-009-8L
VCCQ_3V
Bit 0
Bit 0
X
0
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