MD5811-d256-MECH M-Systems Inc., MD5811-d256-MECH Datasheet - Page 61

• Manufacturer Part Number: MD5811-d256-MECH
• Description: Mobile Diskonchip P3 Data Sheet
• Manufacturer: M-Systems Inc.

10.
10.1 General Guidelines
A typical RISC processor memory architecture is shown in Figure 17. It may include the following
devices:
•
•
•
•
•
58
When used as a boot device, Mobile DiskOnChip P3 eliminates the need for a dedicated boot ROM/NOR device.
Mobile DiskOnChip P3: Contains the OS image, applications, registry entries, back-up data,
user files and data, etc. It can also be used to perform boot operation, thereby replacing the
need for a separate boot device.
CPU: Mobile DiskOnChip P3 is compatible with all major CPUs in the mobile market,
including:
o
o
o
o
o
o
o
Boot Device: ROM or NOR flash that contains the boot code required for system initialization,
kernel relocation, loading the operating systems and/or other applications and files into the
RAM and executing them.
RAM/DRAM Memory: This memory is used for code execution.
Other Devices: A DSP processor, for example, may be used in a RISC architecture for
enhanced multimedia support.
D
ARM-based CPUs
Texas Instruments OMAP
Intel StrongARM SA-1100/1 and XScale
SuperH SH-3/4
Motorola PowerPC MPC8xx and DragonBall MX1
Philips PR31700
NEC VRSeries VR3/4xxxx
ESIGN
C
Figure 17: Typical System Architecture Using Mobile DiskOnChip P3
ONSIDERATIONS
Boot ROM or NOR Flash
DiskOnChip P3
Boot Device
Mobile
*
Data Sheet, Rev. 0.3
Other Devices
RAM/DRAM
CPU
Mobile DiskOnChip P3
93-SR-009-8L