MT8926 Zarlink Semiconductor, MT8926 Datasheet - Page 31
MT8926
Manufacturer Part Number
MT8926
Description
T1 Performance Monitoring Adjunct Circuit (PMAC)
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT8926.pdf
(36 pages)
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AC Electrical Characteristics
† Timing is over recommended temperature & power supply voltage ranges.
‡ Typical figures are at 25 C and are for design aid only; not guaranteed and not subject to production testing
MT8926
30
CSTi0/1
*
**
Note:
1
2
*FDLEn = 1, FDLEn=0 in the previous frames.
C2i
F0i
FDLo
C2i
IRQ
Data Link Output Delay
Data Link Propagation Delay
INTA Bit. IRQ is returned to High Z by INTA=0, INTA=1 in the previous frames. This can occur in frame n+1 or in a later frame.
Condition initiating interrupt
t
IOD
(IRQ Output Delay) is dependent on the IRQ pull-up resistor.
2.4V
0.4V
Parameters
FDLi Data
Ch 11
Frame n
1
FDLi
FDLo
Note: FDLEn = 0
* *
*
Figure 19 - FDL Message-oriented Signal Timing
Figure 18 - FDL Bit-oriented Message Timing
2.25V
7
0.8V
2.4V
0.4V
High Z
†
Figure 17 - Interrupt Functional Timing
Ch 12
- Facility Data Link Timing (Figures 18 and 19)
6
Sym
t
t
DOD
DPD
TxBOM Data
Ch 0
Min
1
t
DPD
0
2
Typ
1
Ch 31
7
Frame n + 1
‡
Ch 1
0
6
Max
45
40
7
t
Active Low
IOD
6
Units
ns
ns
2
5
.
t
Ch 0
DOD
1*
4
150 pF load
150 pF load
Ch 11
Test Conditions
0
Data Sheet
High Z
7
t
Ch 12
IOD
SEMICMF.019
6