MPC8548E Freescale, MPC8548E Datasheet - Page 72

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MPC8548E

Manufacturer Part Number
MPC8548E
Description
Integrated Processor
Manufacturer
Freescale
Datasheet

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PCI Express
A recovered TX UI is calculated over 3500 consecutive unit intervals of sample data. The eye diagram is
created using all edges of the 250 consecutive UI in the center of the 3500 UI used for calculating the
TX UI.
16.4.3
Table 52
specified at the component pins.
72
V
Symbol
RX-DIFFp-p
UI
defines the specifications for the differential input at all receivers (RXs). The parameters are
Figure 48. Minimum Transmitter Timing and Voltage Output Compliance Specifications
Differential Receiver (RX) Input Specifications
It is recommended that the recovered TX UI is calculated using all edges in
the 3500 consecutive UI interval with a fit algorithm using a minimization
merit function (for example, least squares and median deviation fits).
MPC8548E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 4
(D+ D– Crossing Point)
peak-to-peak
input voltage
Unit interval
Parameter
Differential
V
RX-DIFF
Table 52. Differential Receiver (RX) Input Specifications
= 0 mV
566 mV (3 dB) >= V
399.88
0.175
Min
0.07 UI = UI – 0.3 UI (J
V
V
Nom
TX-DIFFp-p-MIN
TX-DIFFp-p-MIN
400
[De-Emphasized Bit]
[Transition Bit]
[Transition Bit]
TX-DIFFp-p-MIN
NOTE
400.12
1.200
Max
= 800 mV
= 800 mV
TX-TOTAL-MAX
Unit
ps
V
>= 505 mV (4 dB)
Each UI is 400 ps ± 300 ppm. UI does not account
for spread spectrum clock dictated variations.
See Note 1.
V
RX-DIFFp-p
(D+ D– Crossing Point)
)
V
TX-DIFF
= 2*|V
= 0 mV
RX-D+
Comments
– V
Freescale Semiconductor
RX-D–
|. See Note 2.

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