MPC8548E Freescale, MPC8548E Datasheet - Page 29

• Manufacturer Part Number: MPC8548E
• Description: Integrated Processor
• Manufacturer: Freescale

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8.2.2
This section describes the GMII transmit and receive AC timing specifications.
8.2.2.1
Table 25
Freescale Semiconductor
GMII data TXD[7:0], TX_ER, TX_EN setup time
GTX_CLK to GMII data TXD[7:0], TX_ER, TX_EN delay
GTX_CLK data clock rise time (20%–80%)
GTX_CLK data clock fall time (80%–20%)
Notes:
1. The symbols used for timing specifications follow the pattern t
2. Guaranteed by design.
and t
(GT) with respect to the t
the valid state (V) to state or setup time. Also, t
reference (K) going to the high state (H) relative to the time date input signals (D) going invalid (X) or hold time. Note that, in
general, the clock reference symbol representation is based on three letters representing the clock of a particular functional.
For example, the subscript of t
used with the appropriate letter: R (rise) or F (fall).
(first two letters of functional block)(reference)(state)(signal)(state)
provides the GMII transmit AC timing specifications.
RXD[7:0]
RX_CLK
GMII AC Timing Specifications
RX_ER
RX_DV
GMII Transmit AC Timing Specifications
MPC8548E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 4
Parameter/Condition
GTX
clock reference (K) going to the high state (H) relative to the time date input signals (D) reaching
t
FIRH
GTX
Table 25. GMII Transmit AC Timing Specifications
represents the GMII(G) transmit (TX) clock. For rise and fall times, the latter convention is
Figure 7. FIFO Receive AC Timing Diagram
t
FIR
GTKHDX
t
FIRDV
Valid Data
symbolizes GMII transmit timing (GT) with respect to the t
for outputs. For example, t
(first two letters of functional block)(signal)(state)(reference)(state)
Symbol
t
t
GTKHDV
t
GTKHDX
t
GTXR
GTXF
2
t
2
FIRDX
1
Min
2.5
0.5
—
—
GTKHDV
t
FIRF
Enhanced Three-Speed Ethernet (eTSEC)
symbolizes GMII transmit timing
Typ
—
—
—
—
t
FIRR
Max
5.0
1.0
1.0
—
GTX
for inputs
Unit
clock
ns
ns
ns
ns
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