LFECP40 Lattice Semiconductor, LFECP40 Datasheet - Page 44

• Manufacturer Part Number: LFECP40
• Description: (LFEC Series) LatticeECP/EC Family Data Sheet
• Manufacturer: Lattice Semiconductor

Lattice Semiconductor
Differential HSTL and SSTL
Differential HSTL and SSTL outputs are implemented as a pair of complementary single-ended outputs. All allow-
able single-ended output classes (class I and class II) are supported in this mode.
BLVDS
The LatticeECP/EC devices support BLVDS standard. This standard is emulated using complementary LVCMOS
outputs in conjunction with a parallel external resistor across the driver outputs. BLVDS is intended for use when
multi-drop and bi-directional multi-point differential signaling is required. The scheme shown in Figure 3-1 is one
possible solution for bi-directional multi-point differential signals.
Figure 3-1. BLVDS Multi-point Output Example
Table 3-1. BLVDS DC Conditions
2.5V
2.5V
+
-
Z
R
R
V
V
V
V
I
1. For input buffer, see LVDS table.
DC
OUT
OH
OL
OD
Parameter
TLEFT
TRIGHT
CM
80
80
Heavily loaded backplane, effective Zo ~ 45 to 90 ohms differential
2.5V
Over Recommended Operating Conditions
Output impedance
Left end termination
Right end termination
Output high voltage
Output low voltage
Output differential voltage
Output common mode voltage
DC output current
1
45-90 ohms
80
2.5V
Description
80
3-8
-
. . .
. . .
2.5V
80
Zo = 45
1.375
1.125
0.25
1.25
11.2
100
45
45
Typical
DC and Switching Characteristics
LatticeECP/EC Family Data Sheet
2.5V
80
45-90 ohms
Zo = 90
1.48
1.02
0.46
1.25
10.2
100
90
90
80
-
Units
ohm
ohm
ohm
mA
V
V
V
V
2.5V
2.5V
+
-