LFECP40 Lattice Semiconductor, LFECP40 Datasheet - Page 2

• Manufacturer Part Number: LFECP40
• Description: (LFEC Series) LatticeECP/EC Family Data Sheet
• Manufacturer: Lattice Semiconductor

November 2004
Features
Table 1-1. LatticeECP/EC Family Selection Guide
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or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
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PFU/PFF Rows
PFU/PFF Columns
PFUs/PFFs
LUTs (K)
Distributed RAM (Kbits)
EBR SRAM (Kbits)
EBR SRAM Blocks
sysDSP Blocks
18x18 Multipliers
V
Number of PLLs
Packages and I/O Combinations:
100-pin TQFP (14 x 14 mm)
144-pin TQFP (20 x 20 mm)
208-pin PQFP (28 x 28 mm)
256-ball fpBGA (17 x 17 mm)
484-ball fpBGA (23 x 23 mm)
672-ball fpBGA (27 x 27 mm)
900-ball fpBGA (31 x 31 mm)
1. LatticeECP devices only.
CC
Extensive Density and Package Options
sysDSP™ Block (LatticeECP™ Versions)
Embedded and Distributed Memory
Flexible I/O Buffer
Voltage (V)
• 1.5K to 41K LUT4s
• 65 to 576 I/Os
• Density migration supported
• High performance multiply and accumulate
• 4 to 10 blocks
• 18 Kbits to 645 Kbits sysMEM™ Embedded
• Up to 163 Kbits distributed RAM
• Flexible memory resources:
• Programmable sysIO™ buffer supports wide
Block RAM (EBR)
range of interfaces:
− 4 to 10 36x36 multipliers or
– 16 to 40 18x18 multipliers or
− 32 to 80 9x9 multipliers
− Distributed and block memory
Device
1
1
LFEC1
192
112
1.5
1.2
12
16
18
67
97
—
—
6
2
2
LFEC3
LatticeECP/EC Family Data Sheet
384
145
160
3.1
1.2
16
24
12
55
67
97
—
—
6
2
LFECP6
LFEC6/
768
147
195
224
6.1
1.2
24
32
25
92
10
16
97
4
2
1-1
LFECP10
LFEC10/
Dedicated DDR Memory Support
sysCLOCK™ PLLs
System Level Support
Low Cost FPGA
1280
10.2
• Implements interface up to DDR400 (200MHz)
• Up to 4 analog PLLs per device
• Clock multiply, divide and phase shifting
• IEEE Standard 1149.1 Boundary Scan, plus
• SPI boot flash interface
• 1.2V power supply
• Features optimized for mainstream applications
• Low cost TQFP and PQFP packaging
277
147
195
288
1.2
32
40
41
30
20
5
4
ispTRACY™ internal logic analyzer capability
− LVCMOS 3.3/2.5/1.8/1.5/1.2
− LVTTL
− SSTL 3/2 Class I, II, SSTL18 Class I
− HSTL 18 Class I, II, III, HSTL15 Class I, III
− PCI
− LVDS, Bus-LVDS, LVPECL, RSDS
LFECP15
LFEC15/
1920
15.4
350
195
352
1.2
40
48
61
38
24
6
4
LFECP20
LFEC20/
2464
19.7
424
360
400
1.2
44
56
79
46
28
7
4
Introduction
Preliminary Data Sheet
LFECP33
LFEC33/
4096
32.8
131
535
360
496
1.2
64
64
58
32
8
4
Introduction_01.2
LFECP40
LFEC40/
5120
41.0
164
645
496
576
1.2
64
80
70
10
40
4