LFECP40 Lattice Semiconductor, LFECP40 Datasheet - Page 19

• Manufacturer Part Number: LFECP40
• Description: (LFEC Series) LatticeECP/EC Family Data Sheet
• Manufacturer: Lattice Semiconductor

Lattice Semiconductor
MULT sysDSP Element
This multiplier element implements a multiply with no addition or accumulator nodes. The two operands, A and B,
are multiplied and the result is available at the output. The user can enable the input/output and pipeline registers.
Figure 2-18 shows the MULT sysDSP element.
Figure 2-18. MULT sysDSP Element
MAC sysDSP Element
In this case the two operands, A and B, are multiplied and the result is added with the previous accumulated value.
This accumulated value is available at the output. The user can enable the input and pipeline registers but the out-
put register is always enabled. The output register is used to store the accumulated value. A registered overflow
signal is also available. The overflow conditions are provided later in this document. Figure 2-19 shows the MAC
sysDSP element.
Figure 2-19. MAC sysDSP Element
Multiplicand
Multiplier
SignedAB
Addn
Accumsload
Shift Register B Out
Shift Register B In
Multiplicand
Multiplier
Signed
Shift Register B Out
Shift Register B In
n
Register B
Input Data
n
n
n
n
Register
Input Data
Register B
Register
Register
Input
Input
Input
m
n
n
n
Input Data
Register A
Register
Input
m
n
Shift Register A Out
m
Shift Register A In
m
Register
Register
Pipeline
Pipeline
Register
Pipeline
Register A
Input Data
m
n
m
m
Shift Register A Out
m
Shift Register A In
Accumulator
Accumulator
Accumulator
2-16
Multiplier
To
To
To
Pipeline
Register
Multiplier
x
m
n
To
(default)
m+n
Multiplier
Register
Pipeline
x
CLK (CLK0,CLK1,CLK2,CLK3)
CE (CE0,CE1,CE2,CE3)
RST(RST0,RST1,RST2,RST3)
LatticeECP/EC Family Data Sheet
Accumulator
m+n+16 bits
CLK (CLK0,CLK1,CLK2,CLK3)
CE (CE0,CE1,CE2,CE3)
RST(RST0,RST1,RST2,RST3)
(default)
(default)
m+n
m+n+16 bits
m+n
(default)
Output
Architecture
Output
Overflow
signal