ADSP-21060 Analog Devices, ADSP-21060 Datasheet - Page 7

• Manufacturer Part Number: ADSP-21060
• Description: ADSP-2106x SHARC DSP Microcomputer Family
• Manufacturer: Analog Devices

CBUG and SHARCPAC are trademarks of Analog Devices, Inc.
EZ-LAB is a registered trademark of Analog Devices, Inc.
DEVELOPMENT TOOLS
The ADSP-21060 is supported with a complete set of software
and hardware development tools, including an EZ-ICE In-
Circuit Emulator, EZ-Kit, and development software. The
SHARC EZ-Kit is a complete low cost package for DSP evalua-
tion and prototyping. The EZ-Kit contains a PC plug-in card
(EZ-LAB
also includes an optimizing compiler, assembler, instruction
level simulator, run-time libraries, diagnostic utilities and a
complete set of example programs.
The same EZ-ICE hardware can be used for the ADSP-21061/
ADSP-21062, to fully emulate the ADSP-21060, with the excep-
tion of displaying and modifying the two new SPORTS registers
unique to ADSP-21061.
Analog Devices ADSP-21000 Family Development Software
includes an easy to use Assembler based on an algebraic syntax,
Assembly Library/Librarian, Linker, instruction-level Simulator,
an ANSI C optimizing Compiler, the CBUG™ C Source—
Level Debugger and a C Runtime Library including DSP and
mathematical functions. The Optimizing Compiler includes
Numerical C extensions based on the work of the ANSI Nu-
merical C Extensions Group. Numerical C provides extensions
to the C language for array selections, vector math operations,
complex data types, circular pointers and variably dimensioned
MULTIPROCESSOR
®
MEMORY SPACE
) with an ADSP-21062 (5 V) processor. The EZ-Kit
INTERNAL
MEMORY
NORMAL WORD ADDRESSING: 32-BIT DATA WORDS
SHORT WORD ADDRESSING: 16-BIT DATA WORDS
SPACE
NORMAL WORD ADDRESSING
SHORT WORD ADDRESSING
INTERNAL MEMORY SPACE
INTERNAL MEMORY SPACE
INTERNAL MEMORY SPACE
INTERNAL MEMORY SPACE
INTERNAL MEMORY SPACE
INTERNAL MEMORY SPACE
BROADCAST WRITE
IOP REGISTERS
OF ADSP-2106x
OF ADSP-2106x
OF ADSP-2106x
OF ADSP-2106x
OF ADSP-2106x
OF ADSP-2106x
WITH ID=001
WITH ID=101
ADSP-2106xs
WITH ID=011
WITH ID=100
WITH ID=010
WITH ID=110
TO ALL
48-BIT INSTRUCTION WORDS
0x0030 0000
0x0038 0000
0x003F FFFF
0x0004 0000
0x0008 0000
0x0010 0000
0x0018 0000
0x0020 0000
0x0028 0000
0x0000 0000
0x0002 0000
EXTERNAL
arrays. The ADSP-21000 Family Development Software is
available for both the PC and Sun platforms.
The ADSP-21060 EZ-ICE Emulator uses the IEEE 1149.1
JTAG test access port of the ADSP-21060 processor to monitor
and control the target board processor during emulation. The
EZ-ICE provides full-speed emulation, allowing inspection
and modification of memory, registers, and processor stacks.
Nonintrusive in-circuit emulation is assured by the use of the
processor’s JTAG interface—the emulator does not affect target
system loading or timing.
Further details and ordering information are available in the
ADSP-21000 Family Hardware and Software Development Tools
data sheet (ADDS-210xx-TOOLS). This data sheet can be
requested from any Analog Devices sales office or distributor.
In addition to the software and hardware development tools
available from Analog Devices, third parties provide a wide
range of tools supporting the SHARC processor family. Hard-
ware tools include SHARC PC plug-in cards multiprocessor
SHARC VME boards, and daughter and modules with multiple
SHARCs and additional memory. These modules are based on
the SHARCPAC™ module specification. Third Party software
tools include an Ada compiler, DSP libraries, operating systems
and block diagram design tools.
ADDITIONAL INFORMATION
This data sheet provides a general overview of the ADSP-21060
architecture and functionality. For detailed information on the
ADSP-21000 Family core architecture and instruction set, refer
to the ADSP-2106x SHARC User’s Manual, Second Edition.
MEMORY
SPACE
ADSP-21060/ADSP-21060L
NONBANKED
(OPTIONAL)
BANK 0
BANK 1
BANK 2
BANK 3
DRAM
0x0040 0000
0xFFFF FFFF
BANK SIZE IS
SELECTED BY
MSIZE BIT FIELD OF
SYSCON
REGISTER.
MS
MS
MS
MS
0
1
2
3