MCIMX25 Motorola Semiconductor Products, MCIMX25 Datasheet - Page 17

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MCIMX25

Manufacturer Part Number
MCIMX25
Description
Manufacturer
Motorola Semiconductor Products
Datasheet

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3.4
This section includes the DC parameters of the following I/O types:
3.4.1
The DDR pad type is configured by the IOMUXC_SW_PAD_CTL_GRP_DDRTYPE register (see the
External Signals and Pin Multiplexing chapter of the i.MX25 Reference Manual for details).
Freescale Semiconductor
Junction to case (top)
Junction to package top
Junction-to-ambient thermal resistance determined per JEDC JESD51-3 and JESD51-6. Thermal test board meets JEDEC
specification for this package.
Junction-to-board thermal resistance determined per JEDC JESD51-8. Thermal test board meets JEDEC specification for this
package.
Junction-to-case at the top of the package determined using MIL-STD 883 Method 1012.1. The cold plate temperature is used
for the case temperature. Reported value includes the thermal resistance of the interface layer.
Thermal characterization parameter indicating the temperature difference between the package top and the junction
temperature per JEDEC JESD51-2. When Greek letters are not available, this thermal characterization parameter is written
as Psi-JT.
DDR I/O: Mobile DDR (mDDR), double data rate (DDR2), or synchronous dynamic random
access memory (SDRAM)
General purpose I/O (GPIO)
I/O DC Parameters
DDR I/O DC Parameters
The term ‘OVDD’ in this section refers to the associated supply rail of an
input or output. The association is shown in the “Signal Multiplexing”
chapter of the reference manual.
3
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 2
4
Rating
Table 12. Thermal Resistance Data (continued)
Natural convection
NOTE
Condition
Symbol
R
eJCtop
JT
Value
13
2
°C/W
°C/W
Unit
17

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