MCIMX25 Motorola Semiconductor Products, MCIMX25 Datasheet - Page 103

• Manufacturer Part Number: MCIMX25
• Manufacturer: Motorola Semiconductor Products

Note:
Freescale Semiconductor
• All the timings for the SSI are given for a non-inverted serial clock polarity (TSCKP/RSCKP = 0) and a non-inverted frame sync
• All timings are on pads when SSI is being used for a data transfer.
• ”Tx” and “Rx” refer, respectively, to the transmit and receive sections of the SSI.
• For internal frame sync operation using external clock, the FS timing is the same as that of Tx data (for example, during AC97
(TFSI/RFSI = 0). If the polarity of the clock and/or the frame sync have been inverted, all the timing remains valid by inverting
the clock signal STCK/SRCK and/or the frame sync STFS/SRFS shown in the tables and in the figures.
mode of operation).
SS10
SS12
SS14
SS15
SS16
SS17
SS18
SS19
SS42
SS43
SS52
SS6
SS8
SS1
SS2
SS3
SS4
SS5
ID
(Tx/Rx) CK clock period
(Tx/Rx) CK clock high period
(Tx/Rx) CK clock rise time
(Tx/Rx) CK clock low period
(Tx/Rx) CK clock fall time
(Tx) CK high to FS (bl) high
(Tx) CK high to FS (bl) low
(Tx) CK high to FS (wl) high
(Tx) CK high to FS (wl) low
(Tx/Rx) internal FS rise time
(Tx/Rx) internal FS fall time
(Tx) CK high to STXD valid from high impedance
(Tx) CK high to STXD high/low
(Tx) CK high to STXD high impedance
STXD rise/fall time
SRXD setup before (Tx) CK falling
SRXD hold after (Tx) CK falling
Loading
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 2
Table 77. SSI Transmitter Timing with Internal Clock
Parameter
Synchronous Internal Clock Operation
Internal Clock Operation
Min.
81.4
36.0
36.0
10.0
0.0
—
—
—
—
—
—
—
—
—
—
—
—
—
Max.
15.0
15.0
15.0
15.0
15.0
15.0
15.0
25.0
6.0
6.0
6.0
6.0
6.0
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pf
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